Negative Voltage Mode Selection Circuit for Pin-Limited MCUs
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Solution Overview
Problem
Microcontrollers (MCUs) face a cost constraint due to the trade-off between feature range and product cost, limiting their application scope, and existing negative voltage detector circuits are prone to false triggering and lack versatility in managing multiple voltage domains.
Innovation Solution
Incorporating a negative voltage detector circuit that provides a user-selectable mode by detecting voltage differences across existing pins, enabling new operational modes without adding extra pins, and enhancing robustness with NAND gates, capacitors, and hysteretic buffers to prevent false triggering and manage multiple voltage domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a negative voltage detector circuit is added to detect voltage differences across existing pins, then user-selectable modes are enabled without adding extra pins, but circuit complexity increases due to additional components like NAND gates, capacitors, and hysteretic buffers
Solution Approach 1:
The negative voltage detector circuit is designed to detect voltage differences across existing pins that can serve multiple functions. The same pins are used for both general I/O operations and mode selection, allowing the circuit to perform multiple functions without adding extra pins. This multi-functionality approach enables user-selectable modes while maintaining pin versatility.
Solution Approach 2:
Hysteretic buffers are introduced as intermediary components to mediate between the voltage detection function and the mode selection logic. These buffers provide signal conditioning and noise filtering, enabling reliable mode detection while isolating the complexity of the detection circuitry from the main MCU logic.
2Device complexity
If existing pins are used for mode selection, then the number of pins remains unchanged, but false triggering occurs due to voltage fluctuations and noise
Solution Approach 1:
Capacitors are placed in parallel with the voltage detection circuit to provide beforehand cushioning against voltage fluctuations and noise. These capacitors filter out high-frequency noise and prevent false triggering by maintaining a stable detection voltage, cushioning the circuit against transient disturbances before they can cause erroneous mode detection.
Solution Approach 2:
Hysteretic buffers act as intermediary components that introduce hysteresis to the detection circuit. This hysteresis creates different threshold levels for rising and falling edges, preventing false triggering by requiring a significant voltage change to switch modes. The intermediary buffer isolates the detection logic from noise while maintaining reliable mode selection.
3Adaptability or versatility
If the detector manages multiple voltage domains, then versatility across different operating conditions is improved, but the detector design becomes more complex
Solution Approach 1:
The voltage detector is segmented into multiple independent detection paths, each configured to detect voltage differences in specific voltage domains. By dividing the detection function into separate segments, each path can be optimized for its specific voltage domain while sharing common components like capacitors and buffers, managing multi-domain complexity through functional segmentation.
Solution Approach 2:
The detector circuit is designed with universal components that can operate across multiple voltage domains. The same capacitors, NAND gates, and hysteretic buffers are configured to detect voltage differences in different voltage domains, allowing a single detector design to manage multiple voltage domains through multi-functionality rather than requiring separate dedicated circuits for each domain.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables cost-effective addition of user-selectable modes to MCUs, reducing incremental product costs and improving reliability by preventing false triggers and enabling control across multiple voltage domains.
Implementation Method 1
a negative voltage detector circuit having a power supply input coupled to a power supply voltage terminal, a ground input coupled to a ground voltage terminal, a first input coupled to a first signal terminal, a second input coupled to a second signal terminal and an output for providing an enable signal when a voltage on the first signal terminal is less than a voltage on the ground voltage terminal by at least a predetermined amount
Implementation Method 2
The logic circuit changes an operation of the integrated circuit in response to an activation of the enable signal
Data Source
AI summary
In one form, an integrated circuit includes a negative voltage detector circuit and a logic circuit. The negative voltage detector circuit has a power supply input coupled to a power supply voltage terminal, a ground input coupled to a ground voltage terminal, a first input coupled to a first signal terminal, a second input coupled to a second signal terminal, and an output for providing an enable signal when a voltage on the first signal terminal is less than a voltage on the ground voltage terminal by at least a predetermined amount when a signal on said second signal terminal is in a first predetermined logic state. The logic circuit has an input for receiving the enable signal. The logic circuit changes an operation of the integrated circuit in response to an activation of the enable signal.