Negative Voltage Generator With NMOS Pump-Node Discharge
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Solution Overview
Problem
Existing negative voltage generators suffer from degraded pumping speed and performance due to the use of p-type metal oxide semiconductor (PMOS) transistors, which require a voltage lower than the threshold voltage to turn on, leading to increased circuit area and power consumption.
Innovation Solution
The use of n-type metal oxide semiconductor (NMOS) transistors for discharging pumping nodes, along with inverters with a ground gated configuration, eliminates the need for additional pumping capacitors and circuits, enhancing pumping speed and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If PMOS transistors are used for discharging pumping nodes, then the circuit can operate, but the pumping speed degrades and additional pumping capacitors are required
Solution Approach 1:
The patent changes the transistor type parameter from PMOS to NMOS for the discharging transistor. NMOS transistors have higher electron mobility compared to PMOS hole mobility, resulting in faster discharge of pumping nodes and improved pumping speed without requiring additional capacitors
Solution Approach 2:
The patent removes the requirement for additional pumping capacitors by using NMOS transistors instead of PMOS transistors. The NMOS transistor's inherent faster discharge capability eliminates the need for external capacitance to achieve the required pumping speed
2Loss of energy
If PMOS transistors are used for discharging pumping nodes, then the circuit can operate, but power consumption increases
Solution Approach 1:
The patent changes the transistor type from PMOS to NMOS, utilizing the higher electron mobility of NMOS to reduce the time required for discharging pumping nodes. This reduces the duration of current flow and associated power consumption while maintaining operational efficiency
3Area of stationary object
If voltage lower than threshold voltage is required to turn on PMOS transistors, then the PMOS can be activated, but circuit area increases
Solution Approach 1:
The patent changes the transistor type from PMOS to NMOS, which has different threshold voltage characteristics and higher carrier mobility. This allows for more efficient operation with reduced circuit area requirements while maintaining reliable activation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The NMOS transistors enable efficient discharging of pumping nodes, improving pumping speed and performance while reducing circuit area and power consumption, with faster transition times and lower power consumption compared to PMOS-based generators.
Implementation Method 1
a first pumping capacitor connected between a first pumping node and a first input node, the first input node being configured to receive an inverted clock signal; a second pumping capacitor connected between a second input node and a second pumping node, the second input node being configured to receive a clock signal
Implementation Method 2
a first discharging circuit configured to discharge the first pumping node... the first discharging circuit includes: a first n-type metal oxide semiconductor (NMOS) transistor connected between the first pumping node and a ground voltage
Data Source
AI summary
A negative voltage generator includes a first pumping capacitor, a second pumping capacitor, a voltage outputting circuit, a first discharging circuit and a second discharging circuit. The first pumping capacitor is connected between a first input node receiving an inverted clock signal and a first pumping node. The second pumping capacitor is connected between a second input node receiving a clock signal and a second pumping node. The voltage outputting circuit is connected to the first pumping node, the second pumping node and an output node outputting a negative voltage, and generates the negative voltage based on the clock signal and the inverted clock signal. The first and second discharging circuits discharge the first and second pumping nodes, respectively. The first discharging circuit includes a first NMOS transistor and a first inverter. The first NMOS transistor is connected between the first pumping node and a ground voltage. The first inverter controls a voltage of a gate electrode of the first NMOS transistor.