Neighboring Die Seal Ring Interconnect for Lower-Resistance Packaging
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Solution Overview
Problem
In three-dimensional semiconductor packages, the long distance between stacked dies increases circuit resistance due to the need for signals to travel through the first die, leading to inefficiencies in electrical connections and potential contamination risks.
Innovation Solution
The implementation of a semiconductor package with a modified seal ring structure that includes a second seal ring and a third seal ring, each with a circuit seal, allowing for a direct lateral electrical connection between the second and third dies without using through-silicon vias, thereby reducing resistance and protecting against contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If signals travel through the first die to connect stacked dies, then electrical connection is established, but circuit resistance increases
Solution Approach 1:
The patent transitions from vertical signal routing (through the first die) to lateral signal routing (through the seal ring structure). By changing the dimension of the connection path from vertical to horizontal, the signal bypasses the high-resistance path through the first die and achieves lower resistance through the seal ring's conductive structure.
Solution Approach 2:
The seal ring structure acts as an intermediary element that enables direct lateral electrical connection between the second and third dies. Instead of forcing signals through the first die, the seal ring serves as a mediating conductive path that reduces resistance while maintaining electrical connectivity.
2Reliability
If through-silicon via structures are used for die connection, then electrical connection is achieved, but contamination risk increases
Solution Approach 1:
The patent extracts the electrical connection function from the through-silicon via structure and relocates it to the seal ring structure. By removing the connection path from the vertical via structure, the design eliminates the contamination-prone interfaces associated with through-silicon vias while maintaining electrical connectivity through the lateral seal ring path.
Data Source
AI summary
A semiconductor package includes: a first die; a second die stacked on an upper surface of the first die, the second die including a second semiconductor substrate and a second seal ring structure that extends along a perimeter of the second semiconductor substrate; a third die stacked on the upper surface of the first die, the third die including a third semiconductor substrate and a third seal ring structure that extends along a perimeter of the third semiconductor substrate; and a connection circuit that extends through the second seal ring structure and the third seal ring structure, in a lateral direction perpendicular to the stacking direction of the first die and the second die, to electrically connect the second semiconductor substrate and the third semiconductor substrate.