Nested Chopping Analog Front End for Low-Offset ADC Signals
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Solution Overview
Problem
Analog signal processing circuits, particularly analog-to-digital converters (ADCs), face challenges with undesirable offset voltages and frequency components due to noise, which conventional solutions like chopper circuits and anti-aliasing filters address inadequately, often resulting in high component costs and size issues when integrated.
Innovation Solution
An analog front-end (AFE) is designed to include both an anti-aliasing filter (AAF) and nested chopping circuits, with dynamic switch elements and masking circuits to improve settling symmetry and reduce offset voltages, allowing for efficient filtering and offset reduction within a single integrated circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional chopper circuits are used to reduce offset voltages in ADCs, then offset reduction is achieved, but component cost and size increase
Solution Approach 1:
The patent combines the anti-aliasing filter and chopping circuits into a single integrated circuit structure. The AAF and chopping circuits share common components such as capacitors and switches, merging previously separate functions into one unified device that reduces offset voltages without proportionally increasing component count or size.
Solution Approach 2:
The integrated circuit performs multiple functions simultaneously: it acts as both an anti-aliasing filter for frequency filtering and as a chopping circuit for offset voltage reduction. The same physical components serve dual purposes, enabling the system to achieve both filtering and offset reduction without requiring separate dedicated circuits for each function.
2Device complexity
If nested chopping circuits are integrated with anti-aliasing filters in a single IC, then component count and size are reduced, but settling symmetry between positive and negative outputs becomes unmatched
Solution Approach 1:
The patent introduces asymmetry in the chopping circuit operation by applying different chopping frequencies to different parts of the signal path. The first chopping circuit operates at a first frequency while the second chopping circuit operates at a second frequency, creating intentional asymmetric behavior that compensates for the inherent asymmetry in settling times of positive and negative outputs.
Solution Approach 2:
The patent employs dynamic frequency adjustment where the chopping frequencies are programmable and can be changed based on operating conditions. This dynamic capability allows the system to optimize settling symmetry for different signal conditions and filter configurations, transforming a static mismatch problem into a dynamically adjustable parameter.
3Measurement precision
If multiple nested chopping circuit pairs are used in PGA sections, then offset voltages are reduced, but the circuit becomes unsuitable for integration with analog filters
Solution Approach 1:
The patent merges the chopping circuits and anti-aliasing filter into a single integrated structure where they share common components. The chopping circuits are designed to work in conjunction with the AAF rather than as separate entities, enabling seamless integration while maintaining offset reduction performance.
Solution Approach 2:
The patent implements nested chopping circuits where inner chopping circuits are placed within outer chopping circuits in a hierarchical structure. This nesting allows multiple levels of offset cancellation while maintaining a compact integrated design that is compatible with analog filter integration, as the nested structure efficiently uses available circuit space and shared components.
Data Source
AI summary
An integrated circuit can include an amplifier coupled to receive an analog input signal, an anti-aliasing filter (AAF) coupled to an output of the amplifier, a buffer circuit coupled to an output of the AAF, a sigma-delta modulator configured to generate a digital data stream in response to an output of the buffer, and a plurality of chopping circuits nested within one another, including a first pair of chopping circuits having at least the amplifier disposed therebetween and configured to remove offset in the analog input signal, and a second pair of chopping circuit having at least the first pair of chopping circuits disposed therebetween. The amplifier, AAF, sigma-delta modulator, and chopping circuits can be formed with the same integrated circuit substrate. Corresponding methods and systems are also disclosed.