Nested Contact Plug Reduces Parasitic Resistance in FinFETs
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Solution Overview
Problem
As semiconductor devices scale down, parasitic resistance at the metal-semiconductor interface in contact plugs connected to source/drain regions increases, affecting Field Effect Transistor (FET) performance and becoming a dominant component of total resistance, making it challenging to further scale down devices without increasing contact footprint.
Innovation Solution
The integration of a contact plug with an inner semiconductor material portion and an outer metal portion, where the outer portion partially covers the sidewall of the inner portion, and an insulating layer like titanium oxide is used to reduce interface resistivity, increasing the interface area without expanding the contact footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the contact footprint is increased to reduce parasitic resistance, then the resistance of contact structures is reduced, but the device area increases
Solution Approach 1:
The contact plug transitions from a planar two-dimensional interface to a three-dimensional structure with sidewall coverage, increasing the metal-semiconductor interface area by utilizing vertical dimensions. The outer portion wraps around the inner portion, creating additional contact surfaces along the sidewalls, effectively moving the interface from a flat plane to a multi-surface three-dimensional configuration that reduces parasitic resistance without expanding the horizontal footprint.
Solution Approach 2:
The contact plug employs a nested structure where the outer portion envelops the inner portion, with the outer material covering the sidewalls of the inner material. This nested configuration maximizes the interface area between metal and semiconductor by creating concentric layers, allowing the contact to achieve lower resistance through increased surface area while maintaining a compact overall footprint.
2Productivity
If device size is reduced for scaling, then device density increases, but parasitic resistance becomes dominant
Solution Approach 1:
The contact plug structure implements local quality by using different materials with specific properties in different regions: the inner portion uses a material optimized for direct semiconductor contact, while the outer portion uses a material optimized for sidewall coverage and additional interface area. This localized material differentiation allows each region to contribute optimally to reducing parasitic resistance while maintaining overall device scaling.
Solution Approach 2:
The contact plug employs a composite structure with an inner portion and an outer portion made of different materials. The inner portion may consist of a semiconductor or metal material optimized for direct contact, while the outer portion uses a different material optimized for sidewall coverage. This composite approach allows the contact to achieve superior electrical properties by combining the advantages of multiple materials in a scaled-down structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively minimizes parasitic resistance at the metal-semiconductor interface, enhancing FET performance and enabling further scaling of semiconductor devices by maintaining low interface resistivity below 1e−8 Ω-cm2, thus mitigating the adverse effects of device size reduction.
Implementation Method 1
an insulating layer like titanium oxide is used to reduce interface resistivity
Data Source
AI summary
Integrated circuit devices including contacts and methods of forming the same are provided. The devices may include a fin on a substrate, a gate structure on the fin and a source/drain region in the fin at a side of the gate structure. The devices may further include a contact plug covering an uppermost surface of the source/drain region and a sidewall of the gate structure. The contact plug may include an inner portion including a first material and an outer portion including a second material different from the first material. The outer portion may at least partially cover a sidewall of the inner portion, and a portion of the outer portion may be disposed between the sidewall of the gate structure and the sidewall of the inner portion.


