Nested CRC Code Generation for Parallel Error Control
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Solution Overview
Problem
Conventional multi-channel and multi-bit CRC code generation methods face challenges with large storage capacity consumption and poor versatility due to the need for variable remainder conversion tables and significant storage requirements, limiting the improvement of computing speed in data transmission error control.
Innovation Solution
A nested CRC code generation method that segments data into fixed-length segments, allocates fixed pointers, and uses a channel selecting table to allocate appropriate computing channels, allowing for parallel computation and reduced storage resources, enabling high-speed and flexible error control in data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple parallel CRC computation channels are used to improve computing speed, then processing speed increases, but storage capacity consumption increases exponentially due to remainder conversion tables
Solution Approach 1:
The patent implements nested CRC computation where inner CRC codes are computed first, then outer CRC codes are computed based on the inner codes. This nested structure allows multiple CRC channels to share computation results and intermediate states, dramatically reducing the storage capacity needed for remainder conversion tables while maintaining high parallel processing speed.
Solution Approach 2:
The patent designs a universal remainder buffer that can serve multiple CRC computation channels simultaneously. Instead of having separate remainder conversion tables for each channel, a single buffer structure is shared across all channels, reducing storage requirements from exponential to linear growth with the number of channels.
2Productivity
If data is segmented into multiple segments for parallel computation, then computing speed improves, but device complexity increases due to remainder conversion requirements
Solution Approach 1:
The patent applies nested CRC structure where inner CRC computations are performed on data segments, and outer CRC computations are performed on the inner CRC results. This eliminates the need for complex remainder conversion between segments, as the nested structure naturally handles the combination of partial results through polynomial multiplication and addition.
Solution Approach 2:
The patent extracts the remainder conversion operation from the parallel computation path by using a separate outer CRC computation stage. The inner CRC channels compute independently without conversion, and the outer channel performs the final combination, simplifying the overall device structure while maintaining parallel processing capability.
3Reliability
If remainder conversion tables are built for each computing channel, then accurate CRC computation is achieved, but storage capacity increases significantly
Solution Approach 1:
The patent implements a universal remainder buffer that is shared across all CRC computation channels. This single buffer structure performs the remainder conversion function for all channels through the nested computation structure, eliminating the need for multiple separate conversion tables and reducing storage capacity from O(N×2^R) to O(2^R) where N is the number of channels.
Solution Approach 2:
The nested CRC structure allows inner CRC channels to compute remainders independently, then the outer CRC channel computes the final remainder by combining inner results through polynomial operations. This nesting eliminates redundant remainder conversion tables while ensuring accurate CRC computation through the mathematical properties of polynomial division.
Data Source
AI summary
A nested CRC code generation method for data transmission error control, comprising: segmenting the data to be computed, allocating a CRC code computing channel to each of the data segments according to the data type, computing CRC sub-codes by the computing channels, sorting the CRC sub-codes, and generating a nested CRC code by sending the sorted CRC sub-codes to the final CRC code computing channel directly or by using the sorted CRC sub-codes as the new data to be computed, repeating the above CRC sub-code computing process and sending the final sorted CRC sub-codes to the final CRC code computing channel. A nested CRC code generation device for data transmission error control, comprising: a data segmenting module, a computing channel selecting module, a multi-channel CRC code computing module, a data sorting module, a set of registers, a data distributor, a counter and a single-channel CRC code computing module.