Nested Hierarchical Microcoded Compute Engines for Control Store Expansion
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Solution Overview
Problem
Microcoded microprocessors face challenges in enhancing flexibility and computational power while reducing design effort and engineering time, as existing architectures are limited by the width and encoding capability of control stores, which restricts the number and complexity of functional subunits that can be attached to buses.
Innovation Solution
The introduction of nested hierarchical microcoded compute engines, where a microcoded compute engine and a passive functional unit are configured between the sink and source buses, allowing for the replacement of passive functional units with additional compute engines to increase computational power, and enabling data exchange through memory and FIFO access microorders that treat both equally.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the control store width and encoding capability are increased to support more functional subunits, then the computational power and flexibility are improved, but the device complexity and design effort increase
Solution Approach 1:
The patent divides the control store into multiple segments or banks, each handling specific functional subunits. This segmentation allows the system to support more functional subunits without increasing the width of individual control store entries, as multiple segments can be accessed and combined to provide the necessary control signals.
Solution Approach 2:
The patent introduces a new dimension to the control store architecture by adding a segment selection mechanism. Instead of increasing the width of single control store entries, the system uses multiple segments along with selection logic to provide expanded control capability, effectively adding a dimensional aspect to the control store addressing scheme.
2Power
If more functional subunits are attached to the buses, then the computational power is improved, but the control store encoding capability becomes insufficient
Solution Approach 1:
The patent implements a universal control store structure where control words can be used across multiple functional subunits through a standardized encoding scheme. This multi-functionality allows the same control store to support various functional subunits without requiring dedicated encoding for each, thereby maintaining encoding capability while supporting increased computational power.
Solution Approach 2:
The patent introduces control store expansion logic and address mapping mechanisms as intermediaries between the control store and functional subunits. These intermediaries translate and route control signals appropriately, enabling the control store to interface with more functional subunits than its native encoding would directly support.
3Adaptability or versatility
If the control store width is increased to support complex functional subunits, then the number of supported subunits is improved, but the manufacturing complexity increases
Solution Approach 1:
The patent segments the control store into multiple smaller, manageable units that can be manufactured and tested independently. This segmentation reduces the manufacturing complexity of individual control store components while collectively supporting a larger number of functional subunits through the combined capacity of multiple segments.
Solution Approach 2:
The patent employs a nested structure where smaller control store units are organized within larger control store assemblies. This nesting allows for modular manufacturing where smaller units can be produced using standard processes and then combined to form larger control store systems with extended capability.
Data Source
AI summary
A nested hierarchical plurality of microcoded compute engines where each successive compute engine is coupled to a source bus and a sink bus of another microcoded computed engine at a different hierarchical level, where one microcoded compute engine may be a replacement of a scratchpad memory or FIFO from a pre-existing design. A communication scheme for communicating between and within various hierarchical layers of microcoded compute engines and a piano roll of bitmapped barrier objects for synchronizing activities of various microcomputer engines.