Nested LED Interconnect Layouts for Current Spreading and Light Extraction
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Solution Overview
Problem
Solid-state lighting devices, such as LEDs, face limitations in light emission efficiency due to internal reflection and current spreading issues, which hinder the extraction of light and efficient current distribution, particularly in larger area LEDs.
Innovation Solution
The development of interconnect structures within LED chips that increase perimeter contact areas without substantial increases in overall area, utilizing patterned dielectric materials and nested patterns to enhance current injection efficiency for both n-type and p-type layers, including reflective structures to improve adhesion and light extraction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If the LED chip area is increased to improve light output, then the total light emission capacity increases, but current spreading becomes insufficient and current injection efficiency decreases
Solution Approach 1:
The interconnect structure is segmented into multiple components including a base layer, intermediate layer, and top layer with distinct functions. The intermediate layer is divided into multiple finger-like extensions that distribute current across different regions of the LED chip, improving current spreading while maintaining efficient injection.
Solution Approach 2:
The interconnect structure transitions from a simple planar contact to a three-dimensional nested configuration with vertical stacking of conductive layers. This dimensional change allows increased contact perimeter without proportionally increasing the footprint area, enabling better current distribution in larger LED chips.
2Reliability
If the interconnect contact area is increased to improve current injection, then current distribution improves, but the overall chip area occupied by interconnect structures increases
Solution Approach 1:
The interconnect structure employs a nested configuration where the intermediate conductive layer is positioned within the footprint of the top conductive layer, which in turn is positioned within the footprint of the base layer. This nesting allows the contact perimeter to extend into the vertical dimension, increasing effective contact area without proportionally increasing the horizontal footprint.
Solution Approach 2:
The solution moves the interconnect contact from a two-dimensional planar contact to a three-dimensional nested structure. By utilizing the vertical dimension through stacked layers, the contact perimeter is extended without requiring proportional increases in the horizontal chip area occupied by the interconnect structures.
3Ease of manufacture
If conventional interconnect structures are used, then the manufacturing process is simple, but light extraction efficiency is limited due to internal reflection
Solution Approach 1:
The intermediate conductive layer acts as a mediator between the base and top layers, providing both electrical connection and optical function. This intermediate layer with optimized conductivity and optical properties facilitates improved light extraction while maintaining manufacturing simplicity by integrating multiple functions into a single structural element.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The interconnect structures enhance current injection efficiency and light extraction, leading to improved LED performance by increasing the effective contact area and reducing delamination, thereby boosting the overall efficiency and reliability of LED chips.
Implementation Method 1
Reflective surfaces may also be provided to reflect generated light so that such light may contribute to useful emission from an LED chip
Implementation Method 2
it has been found useful to pattern, roughen, or otherwise texture the interface between an LED surface and the surrounding environment to provide a varying surface that increases the probability of refraction over internal reflection
Implementation Method 3
By increasing contact perimeters of interconnects within a certain area, increased current injection efficiency may be provided
Data Source
AI summary
Solid-state lighting devices including light-emitting diode (LED) chips and more particularly interconnect structures for improved LED chip performance are disclosed. Interconnect structures are disclosed within LED chips that are structured to increase perimeter contact areas within localized LED chip areas without substantial increases to overall areas occupied by the interconnect structures. By increasing contact perimeters of interconnects within a certain area, increased current injection efficiency may be provided. Interconnect structures for increased current injection are disclosed for both n-type layers and p-type layers. Interconnect structures may include patterned dielectric materials within interconnect openings and corresponding interconnects that are formed around the patterned dielectric materials. Additional interconnect structures include nested patterns and extensions that provide enhanced adhesion along LED chip perimeters.