Nested Loop Vectorization via Segmented-Stride Memory Access
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Solution Overview
Problem
Existing computational algorithms involving nested loops, such as fast Fourier transforms, suffer from inefficiencies due to non-unit-stride memory accesses, leading to longer runtime and increased power consumption.
Innovation Solution
The implementation of vector memory operations, specifically segmented-strided vector instructions, which combine multiple memory accesses into efficient unit-stride and constant-stride operations, optimizing nested loop structures by unrolling and jamming loops and using vector instructions to fuse memory operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If nested loops are used for computational algorithms like FFT and matrix computations, then algorithm functionality is achieved, but runtime increases and power consumption increases due to non-unit-stride memory accesses
Solution Approach 1:
The patent segments the nested loop structure by unrolling the inner loop into multiple statements, where each statement corresponds to a specific iteration. This segmentation allows the compiler to identify and fuse memory accesses that would otherwise be scattered across multiple loop iterations, converting non-unit-stride accesses into unit-stride accesses that are more efficient for vectorization.
Solution Approach 2:
The patent merges multiple memory accesses from different loop iterations into a single vector memory instruction. By combining these accesses, the system achieves unit-stride or constant-stride memory access patterns that are highly efficient for parallel processing and vectorization, directly reducing runtime and improving computation efficiency.
2Productivity
If nested loops are used for computational algorithms like FFT and matrix computations, then algorithm functionality is achieved, but power consumption increases due to non-unit-stride memory accesses
Solution Approach 1:
The patent segments the nested loop structure by unrolling the inner loop into multiple statements, where each statement corresponds to a specific iteration. This segmentation allows the compiler to identify and fuse memory accesses that would otherwise be scattered across multiple loop iterations, converting non-unit-stride accesses into unit-stride accesses that are more efficient for vectorization.
Solution Approach 2:
The patent merges multiple memory accesses from different loop iterations into a single vector memory instruction. By combining these accesses, the system achieves unit-stride or constant-stride memory access patterns that are highly efficient for parallel processing and vectorization, directly reducing runtime and improving computation efficiency.
3Productivity
If vector memory instructions are used to fuse memory accesses, then computation efficiency improves, but device complexity increases
Solution Approach 1:
The patent employs vector memory instructions that can handle multiple memory access patterns (unit-stride, constant-stride, and strided accesses) through a unified instruction set. This multi-functionality allows the system to optimize various memory access patterns without requiring separate specialized instructions for each pattern, thereby managing device complexity while improving computation efficiency.
Data Source
AI summary
A program sequence, comprising an inner loop nested in an outer loop, may be converted to multiple statements of the inner loop with a statement of the multiple statements changing by an index of the outer loop. A memory access for a first statement of the multiple statements may be combined with a memory access for a second statement of the multiple statements via a vector instruction (e.g., a segmented-strided vector instruction). The vector instruction may be configured to access sets of N data elements, where N is a segment size of data elements in consecutive locations in memory, and where sets of N data elements are spaced at a constant distance in memory.