Nested Package-on-Package Structure for Low Z-Height IC Stacking
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Solution Overview
Problem
Existing integrated circuit packages face challenges in achieving miniaturization and dense stacking, which limits their ability to reduce size and increase functionality in electronic devices, as they occupy more height due to the lack of efficient space-saving techniques.
Innovation Solution
The proposed solution involves a stacked integrated circuit package configuration where an upper package with an opening is mounted to a lower package substrate, allowing for the nesting of integrated circuits, which reduces the vertical height and enables high-density packaging through the use of wire bonds, TSVs, and overmolds for mechanical and electrical coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If traditional integrated circuit packaging is used, then manufacturing and assembly are simpler, but the package occupies more vertical height and reduces miniaturization capability
Solution Approach 1:
The patent implements package-on-package stacking where a first integrated circuit package is mounted on a substrate and a second integrated circuit package is mounted on the first package, with the second package nested within the vertical space above the first package. This nesting approach reduces the overall vertical height occupation by efficiently utilizing the three-dimensional space, allowing multiple packages to occupy a compact footprint while maintaining functional separation and electrical connectivity through wire bonds and TSVs.
Solution Approach 2:
The patent transitions from traditional two-dimensional planar packaging to three-dimensional stacked packaging by mounting packages vertically one on top of another. This dimensional change allows the system to achieve higher integration density by utilizing the vertical Z-axis dimension, thereby reducing the horizontal footprint and overall package height while maintaining electrical connectivity through vertical interconnect structures.
2Adaptability or versatility
If more integrated circuits are stacked to increase functionality, then device capability increases, but the vertical height increases
Solution Approach 1:
The patent employs nested packaging where multiple integrated circuit packages are stacked vertically with each package mounted on the previous one. This nesting strategy allows increased device functionality through multiple circuits while managing vertical height by optimizing the stacking configuration and utilizing the space efficiently within the package structure.
Solution Approach 2:
The patent divides the integrated circuit system into multiple separate packages that can be independently manufactured and then stacked. Each package contains specific functional circuits, and the segmentation allows for modular assembly where packages are connected through wire bonds and TSVs, enabling functionality expansion without proportionally increasing vertical height through optimized inter-package connections.
3Length of moving object
If package-on-package stacking is implemented to reduce height, then miniaturization is achieved, but manufacturing precision requirements increase
Solution Approach 1:
The patent introduces wire bonds and TSVs as intermediary connection structures between stacked packages. These intermediaries provide flexible electrical connections that can accommodate minor misalignments between packages, reducing the stringency of alignment precision requirements during assembly. The wire bonds act as mediators that can tolerate certain positional variations while maintaining reliable electrical connectivity between the stacked packages.
Solution Approach 2:
The patent employs underfill material and molding compounds to modify the physical and mechanical parameters of the package assembly. These materials provide mechanical support, stress distribution, and alignment tolerance that reduce the impact of manufacturing precision variations. By changing the physical state and properties of the packaging materials, the system achieves robust height reduction without requiring extremely tight alignment tolerances.
Data Source
AI summary
Apparatus and methods are provided for integrated circuit packages having a low z-height. In an example, a method can include mounting a first integrated circuit sub-package to a first package substrate wherein the sub-package substrate spans an opening of the first package substrate, mounting a second integrated circuit package to a second package substrate, and mounting the first package substrate with the second package substrate wherein the mounting includes locating a portion of the second integrated circuit package within the opening of the first package substrate.