Nested Pedestal Structure for Moisture Resistance in Semiconductor Devices
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Solution Overview
Problem
Conventional Wafer Level Chip Size Packages face challenges with moisture resistance due to cracking issues that arise from differences in thermal expansion coefficients between the semiconductor substrate and the inter-layer insulating films, leading to potential deterioration in performance.
Innovation Solution
The semiconductor device incorporates a design with a first and second pedestal structure, where the second pedestal is larger and positioned to enclose the first pedestal, with a through hole connecting them, ensuring the first pedestal's side faces are inside the second pedestal's side faces, enhancing moisture resistance by preventing crack propagation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If a conventional wafer level chip size package structure is used with multiple external connection terminals on a chip-shaped semiconductor substrate, then the device achieves small size and reduced thickness, but moisture resistance deteriorates due to cracking from thermal expansion coefficient differences
Solution Approach 1:
The patent implements a nested pedestal structure where a second pedestal is formed surrounding a first pedestal in a plan view. The second pedestal has a larger area than the first pedestal, creating a protective enclosure. This nested configuration allows the second pedestal to cover and protect the first pedestal from moisture intrusion while maintaining the compact wafer-level package size.
Solution Approach 2:
The patent applies beforehand cushioning by forming the second pedestal in advance to cover potential crack paths. The second pedestal is strategically positioned and sized to cover not only the first pedestal but also potential crack regions that may develop due to thermal expansion differences, providing preemptive protection against moisture intrusion before cracking occurs.
2Productivity
If the semiconductor substrate is diced into individual chips after forming redistribution wirings at wafer stage, then manufacturing efficiency is improved, but crack propagation occurs due to thermal expansion coefficient differences between substrate and insulating films
Solution Approach 1:
The nested pedestal structure continues to provide crack resistance in the diced individual chips. Each chip retains the protective second pedestal surrounding the first pedestal, maintaining the protective enclosure even after dicing. This allows wafer-level manufacturing efficiency while preserving individual chip strength and crack resistance.
Solution Approach 2:
The patent applies local quality by concentrating the protective function in the pedestal regions. The second pedestal is specifically designed with larger area and strategic positioning to provide localized reinforcement at critical stress points where cracks are most likely to propagate, while the rest of the chip structure maintains its original design for manufacturing efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses crack development and enhances moisture resistance by ensuring the second pedestal covers any potential cracks from the first pedestal, thereby improving the overall reliability and durability of the semiconductor device.
Implementation Method 1
the second pedestal is larger than the first pedestal, and the whole of the first pedestal is disposed at an inside of the second pedestal
Data Source
AI summary
Disclosed is a semiconductor device that comprises a first insulating film provided on a main face of a semiconductor substrate; a first pedestal provided at a first wiring layer on the first insulating layer; a second insulating film provided on the first wiring layer; and a second pedestal provided at a second wiring layer on the second insulating film, wherein, when the first and second pedestals are projected in a direction perpendicular to the main face onto a plane parallel to the main face, the second pedestal is larger than the first pedestal, and the whole of the first pedestal is disposed at an inside of the second pedestal.