Nested Shunt Resistor Structure for Compact Semiconductor Packaging
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Solution Overview
Problem
Existing semiconductor devices require a chip and a shunt resistor that are parallel and tiled, leading to a challenge in reducing their occupied area.
Innovation Solution
The semiconductor device adjusts the positional relationship between the semiconductor chip and the shunt resistor structure, accommodating the chip within the resistor structure's space, thereby reducing the device's area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the semiconductor chip and shunt resistor are arranged in parallel and tiled configuration, then the electrical connection is simple, but the occupied area is large
Solution Approach 1:
The semiconductor chip is placed inside the accommodating space formed by the connecting part of the shunt resistor structure, creating a nested configuration where one component is housed within another. This nesting approach significantly reduces the overall occupied area compared to parallel tiling while maintaining functional integrity
Solution Approach 2:
The invention transitions from a two-dimensional parallel tiling arrangement to a three-dimensional nested structure by utilizing the accommodating space of the shunt resistor's connecting part to house the semiconductor chip, thereby reducing the footprint area
2Area of stationary object
If the semiconductor chip is placed inside the accommodating space of the shunt resistor structure, then the occupied area is reduced, but the manufacturing complexity increases
Solution Approach 1:
The shunt resistor structure is pre-formed with an integrated accommodating space in its connecting part before the semiconductor chip is installed. This preliminary structuring simplifies the final assembly process by providing a ready-made housing that guides chip placement and reduces alignment complexity
3Reliability
If the first plastic package covers the shunt resistor structure and semiconductor chip, then the sealing integrity is improved, but the heat dissipation capability may be affected
Solution Approach 1:
The first plastic package is designed as a thin-film encapsulation that provides adequate sealing protection for the semiconductor chip and shunt resistor structure while maintaining thermal conductivity. The thin-film structure allows heat to pass through effectively while still providing environmental protection
Data Source
AI summary
The present invention discloses a semiconductor device, the semiconductor device comprises a semiconductor chip and a shunt resistor structure, the semiconductor chip comprises a plurality of conductive terminals, the shunt resistor structure comprises a main part and a connecting part, the connecting part is connected to the end of the main part to form an accommodating space, where the semiconductor chip is located in. The technical solution provided by this application can reduce the occupied area of the semiconductor device.