Nested Through Electrodes for Semiconductor Substrate Distortion
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Solution Overview
Problem
The formation of through electrodes in semiconductor devices using TSV technology leads to distortion in the silicon substrate due to thermal expansion coefficient differences between metal conductors and silicon, limiting the arrangement of semiconductor elements and signal wirings, and constraining wiring layouts, which hinders high integration and increases the risk of copper contamination.
Innovation Solution
A configuration of small-diameter and large-diameter through electrodes is implemented, where the small-diameter electrode is positioned inside the large-diameter electrode in a planar view, with their centers not coinciding, to minimize distortion and allow for higher integration and flexibility in arranging semiconductor elements and signal wirings, while preventing copper diffusion into the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a through electrode is formed in the silicon substrate, then electrical connection is achieved, but distortion is generated in the silicon substrate due to thermal expansion coefficient difference
Solution Approach 1:
The through electrode is divided into two separate electrodes: a first through electrode extending from the main surface and a second through electrode extending from the back surface. These two electrodes meet within the silicon substrate but do not fully overlap, segmenting the electrical connection path to reduce thermal stress concentration and minimize substrate distortion.
Solution Approach 2:
The first through electrode and second through electrode are arranged in a nested configuration where the projection of one electrode partially overlaps with the other electrode in the thickness direction. This nested arrangement allows both electrodes to contribute to electrical connection while minimizing the overall distortion impact on the substrate.
2Reliability
If a through electrode is formed, then electrical connection is established, but a keep out zone is generated limiting semiconductor element arrangement
Solution Approach 1:
By segmenting the through electrode into two separate electrodes (first and second through electrodes) that meet within the substrate, the keep out zone is divided into multiple smaller regions rather than one large zone. This allows semiconductor elements to be arranged in the spaces between these smaller keep out zones, increasing the usable area for element placement.
3Reliability
If a through electrode is formed, then electrical connection is achieved, but wiring layout is constrained
Solution Approach 1:
The segmented electrode structure creates multiple smaller keep out zones instead of one large constraint, providing more flexibility in wiring layout design. Engineers can route signals around the smaller zones created by the first and second through electrodes, enabling more adaptable wiring configurations.
4Reliability
If copper is used for the through electrode, then electrical conductivity is improved, but copper diffusion into the substrate may occur
Solution Approach 1:
A barrier film is introduced as an intermediary layer between the copper-containing through electrodes and the silicon substrate. This barrier film prevents copper atoms from diffusing into the substrate while allowing the through electrodes to maintain their electrical conductivity function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the constrained region for semiconductor elements, increases the area available for element arrangement, and prevents copper contamination, enabling higher integration and flexibility in wiring layouts without compromising the operational characteristics of the semiconductor device.
Implementation Method 1
distortion is generated in the silicon (Si) substrate on a periphery of the through electrode due to a difference of thermal expansion coefficients of a metal conductor constituting the through electrode and silicon (Si)
Data Source
AI summary
A method of manufacturing a semiconductor device includes forming a first via having a first diameter in a first main surface of a semiconductor substrate having a first thickness, after forming a first insulating film on a bottom surface and a side surface of the first via, forming a first through electrode inside the first via a first barrier metal film, after forming the first through electrode, processing the semiconductor substrate from a second main surface on an opposite side of the first main surface to reduce the first thickness of the semiconductor substrate to a second thickness thinner than the first thickness, after processing the semiconductor substrate, forming a third insulating film on the second main surface of the semiconductor substrate, and after forming the third insulating film, sequentially processing the third insulating film and the semiconductor substrate.