Nested Through-Via PCB Structure for Reliable Dense Routing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in electronic product design is to achieve miniaturization and weight reduction while maintaining electrical reliability and circuit design freedom, particularly in semiconductor packages with printed circuit boards.
Innovation Solution
The solution involves a printed circuit board with K base layers stacked, where K is 3 or more, featuring traces on upper and lower surfaces and through vias connecting different vertical levels. The through vias include a first via connecting the lowermost and uppermost layers, and a second via connecting adjacent intermediate layers, with the first via passing through the inside of the second via and being insulated from it.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple through vias are used to connect traces on different vertical levels, then electrical reliability is improved, but device complexity increases
Solution Approach 1:
The patent implements a nested via structure where a first through via passes through the inside of a second through via in the vertical direction. This nesting configuration allows multiple via connections to be achieved within a compact footprint, reducing the overall number of separate via structures needed while maintaining electrical reliability across multiple layers.
Solution Approach 2:
The patent utilizes the vertical dimension by stacking K base layers (where K is 3 or more) and arranging through vias to connect traces across different vertical levels. This three-dimensional via arrangement enables efficient inter-layer connectivity without increasing horizontal footprint, thereby managing complexity while improving electrical reliability.
2Reliability
If the number of through vias is increased to improve electrical reliability, then shielding effect is enhanced, but placement area is consumed
Solution Approach 1:
By nesting the first through via inside the second through via, the patent achieves multiple via connections without proportionally increasing the horizontal placement area. The nested configuration allows via structures to share space in the horizontal plane while maintaining their full vertical connectivity function, thus preserving placement area while enhancing shielding effect.
Solution Approach 2:
The patent moves via connections into the vertical dimension by stacking base layers and routing through vias vertically through multiple levels. This vertical arrangement of through vias provides enhanced shielding and electrical reliability without consuming additional horizontal placement area, as the via structures are arranged along the vertical axis rather than spreading out horizontally.
Data Source
AI summary
The invention provides a printed circuit board and a semiconductor package having the same, the printed circuit board includes traces disposed on respective upper and lower surfaces of the base layers and disposed on different vertical levels from a lowermost layer to an uppermost layer, and through vias connecting traces disposed on different vertical levels to each other and each extending in a vertical direction to pass through at least one of the base layers. The through vias include a first through via connecting the traces at the lowermost layer and the uppermost layer to each other, and a second through via connecting respective traces at adjacent intermediate layers between the lowermost layer and the uppermost layer to each other. The first through via passes through the inside of the second through via in the vertical direction, and the first through via is insulated from the second through via.