Nested Well Semiconductor Structure for High-Voltage LD-MOSFETs
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Solution Overview
Problem
Conventional lateral diffused MOSFETs (LD_MOSFETs) face challenges in tolerating higher voltages, leading to increased equivalent impedance and reduced usable space due to the conventional method of increasing the length of the drift region.
Innovation Solution
A semiconductor structure comprising a substrate with multiple wells and doped regions of varying conductive types and doping concentrations, where the well surrounding the doped regions acts as a drift region, enhancing the breakdown voltage and impedance characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the length of the drift region is increased to tolerate higher voltages, then the breakdown voltage capability is improved, but the usable space is reduced and the equivalent impedance is increased when the LD_MOSFET is turned on
Solution Approach 1:
The patent implements a nested well structure where a first well is formed in the substrate, a second well is formed in the first well, and a third well is formed in the substrate neighboring the first well. This nested configuration allows the drift region functionality to be achieved through vertical stacking of wells rather than horizontal extension, thereby maintaining higher breakdown voltage capability while preserving usable space and reducing equivalent impedance.
Solution Approach 2:
The invention transitions from a conventional horizontal drift region extension to a vertical multi-well structure. By forming wells at different depths (first well in substrate, second well in first well, third well in substrate), the patent utilizes the vertical dimension to achieve voltage tolerance without increasing the horizontal footprint, thus resolving the space-constraint contradiction.
2Reliability
If the length of the drift region is increased to tolerate higher voltages, then the breakdown voltage capability is improved, but the equivalent impedance is increased when the LD_MOSFET is turned on
Solution Approach 1:
The nested well structure concentrates the voltage-blocking function in the vertical well configuration rather than requiring a long horizontal drift region. This reduces the on-state resistance path length while maintaining high breakdown voltage capability, thereby improving power efficiency by reducing equivalent impedance when the device is turned on.
Solution Approach 2:
The patent applies different doping concentrations to different wells to optimize local electrical characteristics. The first well has a first doping concentration, the second well has a second doping concentration, and the third well has a third doping concentration. This local quality variation allows the structure to achieve high breakdown voltage in the vertical direction while maintaining low impedance in the horizontal current flow path.
Data Source
AI summary
A semiconductor structure including a substrate, a first well, a second well, a third well, a first doped region, and a second doped region. The substrate includes a first conductive type. The first well includes a second conductive type and is formed in the substrate. The second well includes the second conductive type and is formed in the first well. The third well includes the first conductive type, is formed in the substrate, and neighbors the first well. The first doped region includes the first conductive type and is formed in the first well. The second doped region includes the first conductive type and is formed in the first well. The first well surrounds all surfaces of the first and the second doped regions.