Pre-route Post-route Net Correlation via Pattern-Based Constraints
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Solution Overview
Problem
Current integrated circuit design optimization tools face challenges in accurately predicting wire delays and via counts during the pre-route stage, leading to misdirection in circuit optimization and inefficient resource allocation due to the use of less accurate delay models, resulting in unoptimized or over-optimized nets.
Innovation Solution
The method involves defining patterns based on routing topologies, layer assignments, and via count estimations to apply net routing constraints and scaling factors, which are used to improve pre-route and post-route correlation by refining placement optimization and actual routing, allowing for more precise delay calculations and optimization techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If detailed delay models are used during pre-route stage, then measurement precision of net delay estimations is improved, but use of energy and time resources increase significantly
Solution Approach 1:
The patent applies different delay estimation approaches to different nets based on their characteristics. Critical nets with high fanout or long paths receive detailed delay models, while less critical nets use simplified models. This local differentiation improves accuracy where needed without uniformly increasing resource consumption across the entire design.
Solution Approach 2:
The patent dynamically adjusts delay model parameters based on net characteristics and routing stage. It uses average values for initial pre-route estimation and transitions to detailed models for post-route optimization. The system changes parameters such as wire delay, via count, and layer resistance based on the specific routing topology and technology node to achieve better accuracy without excessive resource use.
2Use of energy by moving object
If virtual routing with average delay values is used during pre-route stage, then use of energy and time resources is reduced, but measurement precision of net delay estimations deteriorates
Solution Approach 1:
The patent performs preliminary routing with simplified delay models to establish an initial design direction quickly and efficiently. This preliminary action allows the design team to make high-level optimization decisions without the computational burden of detailed delay analysis, then refines critical paths in subsequent post-route optimization stages with more accurate models.
3Device complexity
If conventional place and route tool uses average values for wire delays and via counts, then device complexity is reduced, but measurement precision of delay estimations deteriorates
Solution Approach 1:
The patent implements a dynamic delay estimation system that adapts its complexity based on the routing stage and net characteristics. The system starts with simple average values and progressively introduces more detailed models as routing refines itself. This dynamic approach allows the tool to maintain low complexity during initial stages while achieving high precision in final optimization without requiring the entire tool to be complex.
4Productivity
If pre-route optimization is performed with inaccurate delay models, then productivity is improved through faster optimization cycles, but reliability of optimization results deteriorates
Solution Approach 1:
The patent implements feedback mechanisms that compare pre-route delay estimates with actual post-route measurements. This feedback loop allows the system to identify discrepancies between estimated and actual delays, then use this information to refine future optimizations. The feedback ensures that while pre-route optimization remains fast, the reliability of results is maintained through continuous validation and correction based on actual routing outcomes.
Data Source
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AI summary
A method of improving pre-route and post-route correlation can include performing an initial placement, virtual routing, and lower-effort actual routing for the design. The results of the virtual routing and lower-effort actual routing can be compared to identify nets having miscorrelation. Based on the nets having at least a predetermined miscorrelation, one or more patterns can be defined. At this point, net routing constraints and/or scaling factors can be assigned to nets matching the defined patterns. These net routing constraints and scaling factors can be applied to the nets of the design that match the patterns. Optimized placement and a higher-effort actual routing of the design can be performed using the nets with the applied net routing constraints and scaling factors. An optimized, routed design can be generated as output.