Net Topology Pattern Constraints for IC Routing Optimization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current integrated circuit design processes lack an efficient method to capture and incorporate routing requirements early in the design flow, particularly for analog circuits, which can affect performance due to layout-dependent effects like parasitic effects, as device sizes shrink.

Innovation Solution

A method is introduced to generate constraint information for routing signal lines by creating a net topology pattern structure in computer memory, associated with instance item structures, and displaying it graphically to guide routing tools, allowing for early specification of physical implementation details such as dimensions and spacing, which can be used to override general routing rules.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If routing is performed later in the design process after physical placement, then routing flexibility is maintained, but routing constraints cannot be used to evaluate component placement and performance early in the design flow

Engineering Contradiction:
Improvedesign cycle timeVSAvoidrouting constraint information
Core Design Contradiction:
Loss of timeVSLoss of information

Solution Approach 1:

The patent applies preliminary action by creating net topology patterns and routing constraints during the placement stage rather than waiting until the routing stage. This allows routing constraints to be established early in the design flow, enabling evaluation of component placement and performance before actual routing is performed. The net topology pattern structure is created in advance with constituent elements that define routing requirements, allowing designers to simulate and optimize routing paths without having to perform detailed routing first.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If general routing rules are used without specific net topology patterns, then routing automation is simplified, but layout-dependent effects such as parasitic effects cannot be optimized

Engineering Contradiction:
Improvecircuit performanceVSAvoidrouting constraint structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the routing constraint into discrete constituent elements within the net topology pattern structure. Each constituent element represents a specific routing requirement or constraint that can be independently defined and applied. This segmentation allows the complex routing constraints to be broken down into manageable components that can be systematically applied to different nets and components, making the complexity tractable while enabling precise control over routing paths to optimize for layout-dependent effects.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by allowing different net topology patterns and routing constraints to be applied to different portions of the circuit design. Each net can have its own customized topology pattern with specific constituent elements that address local routing requirements. This enables targeted optimization of routing paths for specific nets based on their unique performance requirements, rather than applying uniform routing rules across the entire design.

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If routing constraints are specified early in the design flow, then component placement can be optimized for routing requirements, but routing flexibility is reduced

Engineering Contradiction:
Improverouting pattern precisionVSAvoidrouting adaptability
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The patent applies dynamics by creating net topology patterns that are flexible and adaptable rather than rigid fixed patterns. The constituent elements of the net topology pattern structure can be configured to provide precise routing control where needed while maintaining adaptability for different routing scenarios. The system allows designers to specify precise routing patterns for critical nets while leaving other nets with more flexible routing options, enabling the routing solution to adapt to different placement outcomes and design changes.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8806405B2Producing a net topology pattern as a constraint upon routing of signal paths in an integrated circuit design
Publication Date: 2014.08.12 CADENCE DESIGN SYST INC
  • US8806405B2 patent drawing
  • US8806405B2 patent drawing
  • US8806405B2 patent drawing

AI summary

A method is provided to produce a constraint information for use to implement a routing process used to generate routing signal lines in an integrated circuit design comprising: producing a net topology pattern structure that corresponds to a logical net that is associated with at least two instance item structures of at least one functional design, wherein the net topology pattern structure is associated with the at least two instance item structures and includes multiple constituent structures that indicate at least one constraint upon physical implementation of the logical net structure.