Netlist Abstraction for IC Floorplanning via Star Netlists
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Solution Overview
Problem
Conventional floorplanning tools for integrated circuit (IC) designs face challenges in generating floorplans efficiently due to the rapid increase in size and complexity, often resulting in prolonged processing times or poor quality outputs.
Innovation Solution
The creation of a netlist abstraction by organizing circuit elements in a logical hierarchy and replacing portions of the netlist with star netlists, where a center object is electrically connected to satellite objects, improving the performance and quality of floorplanning operations through reduced size and optimized placement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional floorplanning tools are used on full netlists for large IC designs, then complete design coverage is achieved, but processing time becomes excessively long
Solution Approach 1:
The patent applies segmentation by dividing the full netlist into hierarchical levels and creating abstractions at each level. Complex circuit designs are segmented into logical hierarchy nodes, with each node represented by a simplified star netlist containing only essential interconnection information. This segmentation allows floorplanning to be performed on manageable abstract models rather than the complete detailed netlist, dramatically reducing processing time while preserving essential spatial relationships.
Solution Approach 2:
The patent extracts only the essential interconnection topology from the full netlist to create abstract representations. By taking out and retaining only the critical net information needed for floorplanning (the star netlist structure with center objects and satellite objects), the method eliminates unnecessary detailed information that would slow down processing, achieving fast floorplanning on large designs.
2Manufacturing precision
If full netlists are used for floorplanning, then accurate placement is achieved, but computational complexity increases
Solution Approach 1:
The patent applies local quality by creating star netlists with different weightings for different types of nets. Specifically, nets connecting center objects to satellite objects are assigned greater weights than nets connecting satellite objects to each other. This local differentiation in weight assignment preserves the most critical spatial relationships needed for accurate placement while simplifying the overall computational model.
Solution Approach 2:
The patent changes parameters by transforming the detailed netlist into an abstract representation with modified parameters. The star netlist structure uses weighted connections and area assignments that capture essential placement constraints without the full complexity of the original netlist, reducing computational complexity while maintaining placement accuracy.
3Reliability
If detailed netlists are processed, then complete design information is retained, but floorplanning quality deteriorates due to tool performance limitations
Solution Approach 1:
The patent creates simplified copies of the full netlist in the form of star netlists at multiple hierarchical levels. These abstract copies retain the essential topological and spatial relationships needed for high-quality floorplanning while being much smaller and easier for tools to process efficiently, thereby improving both floorplan quality and tool performance.
Data Source
AI summary
Systems and techniques for creating a netlist abstraction are described. During operation, an embodiment can receive a netlist for a circuit design, wherein circuit elements in the circuit design are organized in a logical hierarchy (LH). Next, the embodiment can receive a set of LH nodes in the LH. The embodiment can then create the netlist abstraction by, for each LH node in the set of LH nodes, replacing a portion of the netlist that is below the LH node by a star netlist, wherein the star netlist includes a center object that is electrically connected to a set of satellite objects, wherein each satellite object corresponds to a port of the LH node.