Graphical Layout Customization via Netlist-Embedded Text Formulas
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Solution Overview
Problem
Existing compilers require specific knowledge of lower-level layouts to generate graphical data for circuit designs, increasing complexity when dealing with multiple orthogonal customization possibilities, and necessitating multiple overlays for each option.
Innovation Solution
The system uses text formulas embedded in a graphical layout, interpreted using design netlists to customize the layout without the need for compiler code knowledge of lower-level layouts, allowing for customizable graphical layouts and reducing complexity by using a standard via cell and correlating text formulas with netlist connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple overlays are used for each orthogonal customization possibility, then the circuit layout can be personalized for different options, but the device complexity increases
Solution Approach 1:
The patent implements a universal overlay mechanism where a single overlay structure can serve multiple customization purposes through parameterization. Instead of creating separate overlays for each customization option (e.g., two to four overlays for address decoding), the system uses one overlay that can be configured via text formulas to handle different customization scenarios, thereby reducing overall complexity while maintaining adaptability
Solution Approach 2:
The patent employs text formulas that contain parameters which can be dynamically adjusted based on customization requirements. These formulas allow the overlay to adapt its behavior and geometry without requiring structural changes to the overlay itself, enabling flexible customization through parameter modification rather than through multiple fixed overlay designs
2Manufacturing precision
If compilers require specific knowledge of lower-level layouts, then graphical data can be generated accurately, but the ease of operation decreases
Solution Approach 1:
The patent introduces text formulas as an intermediary layer between the compiler and the lower-level layout details. These formulas act as a mediator that captures the essential geometric and topological information needed for accurate graphical data generation without requiring the compiler to directly access or understand complex lower-level layout structures, thus maintaining precision while improving ease of use
Solution Approach 2:
The patent extracts only the necessary information from lower-level layouts into text formula representations. Instead of requiring the compiler to process complete detailed layouts, the system extracts key geometric constraints and topological relationships into simplified formulaic expressions that are easier to handle while still providing sufficient information for accurate graphical data generation
Data Source
AI summary
The present disclosure relates to customization of a circuit layout using information from a netlist, and more particularly, to customization of a circuit layout using embedded formulas and a netlist. The system includes a CPU, a computer readable memory, and a computer readable storage device. The system also includes first program instructions to generate a graphical layout of a circuit, second program instructions to place a text formula on the graphical layout of the circuit, and third program instructions to activate the text formula in order to customize the graphical layout of the circuit. The first program instructions, the second program instructions, and the third program instructions of the system are stored on the computer readable storage device for execution by the CPU via the computer readable memory.