Network Adapter Load Balancing via Frame Context Matching

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Solution Overview

Problem

Current network devices face challenges in efficiently processing high-speed network frames due to limitations in load balancing, which affects their ability to handle increasing data transfer rates effectively.

Innovation Solution

The implementation of a load balancing system within network adapters that generates a frame context using header fields and selects processing paths based on workload, optimizing the distribution of frames across available processors to enhance processing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If network devices operate at very high speeds (e.g., 128 Gbps), then data transfer capability is improved, but processing efficiency deteriorates due to load balancing limitations

Engineering Contradiction:
Improvedata transfer rateVSAvoidprocessing efficiency
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The network device is divided into multiple processors that can independently handle different frames. The load balancing system segments the incoming frame stream and distributes frames to different processors based on context matching, allowing parallel processing while maintaining processing efficiency at high speeds

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary actions by generating frame contexts and pre-establishing context queues before frames arrive. When frames come in at high speed, the load balancing system can quickly match them against pre-generated contexts and assign them to appropriate processors without delay, maintaining both high speed and efficiency

Inventive Principle:
Principle #10Preliminary action

2Productivity

If multiple processors are used to handle frames, then processing capacity is improved, but system complexity increases due to load balancing requirements

Engineering Contradiction:
Improveprocessing capacityVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system creates context copies and stores them in context queues for each processor. Instead of having processors communicate complex state information, the load balancing system uses simple context queue copies to direct frames to the appropriate processor, reducing inter-processor complexity while maintaining high processing capacity

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The load balancing system acts as an intermediary between the incoming frame stream and multiple processors. It generates frame contexts, matches them against context queues, and assigns frames to processors based on workload. This intermediary layer simplifies the overall system by centralizing the coordination logic and allowing processors to work independently

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10740155B1Methods and systems for load balancing in network devices
Publication Date: 2020.08.11 MARVELL ASIA PTE LTD
  • US10740155B1 patent drawing
  • US10740155B1 patent drawing
  • US10740155B1 patent drawing

AI summary

Methods and systems for network devices are provided. One method includes receiving a frame by a network device communicating with a computing device via a peripheral link, the network device receiving the frame via a network connection; using one or more frame header fields to generate a frame context by the network device; determining if a processor of the network device is processing another frame with the same frame context; assigning the frame context to a first processor of the network device, when the first processor is processing the other frame with the same frame context; and when neither processor is processing the same frame context, selecting between the first processor and a second processor of the network device, based on a workload of the first processor and the second processor, the workload determined by a number of contexts that are pending for the first processor and the second processor.