Network Adaptor Co-Processor Integration via Protocol Pipeline TAP Points

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Solution Overview

Problem

Existing network adaptors lack flexibility in integrating co-processors across various layers of the OSI protocol stack, limiting their ability to customize and enhance network processing capabilities while maintaining compatibility with existing software.

Innovation Solution

Implementing a network adaptor with multi-level protocol processing capability and a protocol processing pipeline featuring multiple tap points, allowing co-processors to operate at any layer from L2 to L7, enabling separation of control and data paths and supporting various message switching modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a network adaptor uses a fixed protocol processing architecture, then hardware complexity is reduced, but adaptability and flexibility are limited

Engineering Contradiction:
Improveco-processor integration flexibilityVSAvoidprotocol processing pipeline complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The network adaptor implements a universal protocol processing pipeline that can accommodate multiple co-processors operating at different OSI layers (L2-L7). The pipeline uses standardized TAP point interfaces that allow various co-processors to be integrated without redesigning the entire system, enabling one architecture to serve multiple protocol processing needs

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The protocol processing pipeline is segmented into multiple discrete TAP points corresponding to different OSI layers. Each TAP point can independently interface with co-processors, allowing the system to process different protocol layers separately and simultaneously. This segmentation enables flexible configuration where only required pipeline segments are activated

Inventive Principle:
Principle #1Segmentation

2Productivity

If co-processors are integrated at multiple OSI layers, then protocol processing capability is enhanced, but device complexity increases

Engineering Contradiction:
Improveprotocol processing throughputVSAvoidpipeline structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The pipeline is divided into distinct TAP points at specific OSI layers (e.g., L2, L3, L4, L7), allowing co-processors to be selectively integrated only where needed. Each TAP point operates as an independent interface that can be enabled or disabled based on protocol processing requirements, avoiding unnecessary complexity in unused segments

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The TAP points serve as intermediary interfaces between the main protocol processing pipeline and external co-processors. These standardized intermediaries simplify integration by providing uniform connection points, reducing the complexity of directly connecting diverse co-processors to the core pipeline at multiple layers

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If the control path and data path are combined, then device complexity is reduced, but processing efficiency and flexibility are compromised

Engineering Contradiction:
Improvecontrol and data processing efficiencyVSAvoidpath separation complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The network adaptor architecture separates control plane traffic and data plane traffic into distinct processing paths. Control messages are routed through control TAP points that interface with co-processors for management and configuration tasks, while data packets flow through data TAP points for protocol processing. This segmentation allows simultaneous optimization of both control and data processing without interference

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11025752B1Method to integrate co-processors with a protocol processing pipeline
Publication Date: 2021.06.01 SPEEDNIC LLC
  • US11025752B1 patent drawing
  • US11025752B1 patent drawing
  • US11025752B1 patent drawing

AI summary

A network adaptor (or NIC) is equipped with multi-level protocol processing capability and is implemented with a protocol processing pipeline that has multiple tap points to enable the integration of co-processors to operate with the NIC. The capability leverages the protocol processing pipeline and all the existing NIC software while at the same time enabling the integration of value added co-processors to customize and enhance the NIC capabilities.