Network Buffer Cache Reuse for Transaction Throughput

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional network interfaces experience inefficiency due to the frequent allocation and freeing of network buffers, which significantly reduces performance for transaction-based network traffic, as these operations consume valuable CPU time.

Innovation Solution

Implementing a network buffer cache that re-uses allocated buffers for subsequent transactions, reducing the frequency of buffer allocation and freeing operations by up to 50%, while ensuring minimal impact on bulk data transfers through strategic caching and time-out mechanisms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If network buffers are frequently allocated and freed for each packet, then memory management is simple and flexible, but CPU time is consumed and performance deteriorates

Engineering Contradiction:
Improvebuffer management simplicityVSAvoidnetwork processing performance
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent pre-allocates a pool of network buffers in advance and maintains them in a cached state. When packets need to be processed, buffers are retrieved from the cache rather than allocating new ones, eliminating the need for frequent allocation/freeing operations and reducing CPU time consumption while maintaining operational simplicity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of freeing buffers after each use, the patent recovers and reuses the same buffers from a cached pool. Used buffers are returned to the cache for subsequent packet processing, transforming the one-time use pattern into reusable cycles, thereby reducing the frequency of memory allocation and freeing operations

Inventive Principle:
Principle #34Discarding and recovering

2Productivity

If network buffers are cached and re-used, then buffer allocation frequency is reduced and performance improves, but device complexity increases

Engineering Contradiction:
Improvetransaction throughputVSAvoidbuffer cache management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces a buffer cache as an intermediary structure between the network interface and the packet processing logic. This cache layer abstracts the complexity of buffer management from the main processing logic, providing a simplified interface for buffer acquisition and release while handling the complexity of tracking and reusing buffers in the background

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer cache management system operates autonomously to track, allocate, and reuse buffers without requiring manual intervention or complex external control. The system self-manages the buffer pool, automatically retrieving and returning buffers based on packet processing needs, thereby reducing the operational burden while maintaining the performance benefits

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS7729368B2Network buffer caching
Publication Date: 2010.06.01 VALTRUS INNOVATIONS LTD
  • US7729368B2 patent drawing
  • US7729368B2 patent drawing
  • US7729368B2 patent drawing

AI summary

One embodiment relates to a method of processing packets by a network stack. A first data packet is received from a client via a network, and a network buffer is allocated for the data packet. An indication is given that the data packet is ready for reading by an application. In addition, the network buffer is cached in a network buffer cache. Subsequently, response data may be received from the application, and the network buffer may be re-used from the network buffer cache. The response data may be sent in a second data packet to the client via the network. Finally, the network buffer may be freed. Other embodiments, aspects, and features are also disclosed.