Network Buffer Segmentation for Memory Waste Reduction
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Solution Overview
Problem
Existing network devices face inefficiencies in buffering data units due to resource constraints and the need to store significant numbers of data units temporarily until processing components become available.
Innovation Solution
The proposed solution involves dividing Transport Data Units (TDUs) into smaller Storage Data Units (SDUs) that can fit in SDU buffer entries within physical memory banks, using a TDU-to-SDU Mapping (TSM) memory to store lists indicating which SDU entries store SDUs for a given TDU.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If data units are buffered in fixed-size buffer entries, then buffer management is simplified, but memory waste occurs when dealing with small data units
Solution Approach 1:
The patent divides a Transport Data Unit (TDU) into multiple smaller Storage Data Units (SDUs) that can be stored in fixed-size buffer entries. Each SDU is a segment of the original TDU, allowing efficient utilization of buffer space while maintaining manageable fixed-size storage units. This segmentation resolves the contradiction by enabling both simple fixed-size buffer management and reduced memory waste through granular data storage.
2Loss of substance
If data units are divided into smaller segments, then buffer space utilization is improved, but system complexity increases due to mapping requirements
Solution Approach 1:
The patent creates a TDU-to-SDU mapping structure that copies the organizational information of a TDU into multiple SDU entries. Instead of storing complex TDU structures directly in buffers, the system creates simplified SDU copies that reference the original TDU through mapping relationships. This approach reduces memory waste while managing complexity through structured copying rather than direct storage of complex objects.
Solution Approach 2:
The patent introduces a mapping memory as an intermediary between the TDU and SDU buffer entries. This mapping structure serves as a mediator that tracks which SDUs belong to which TDU, enabling efficient buffer management without requiring complex direct relationships between TDUs and buffer entries. The intermediary mapping layer simplifies the overall system architecture while enabling fine-grained buffer utilization.
3Reliability
If entire Transport Data Units are stored together, then data integrity is maintained, but processing speed decreases due to sequential access requirements
Solution Approach 1:
The patent segments a TDU into multiple SDUs that can be stored in different buffer locations and accessed in parallel. While the TDU is logically divided, the segmentation enables concurrent read/write operations on different SDU segments, improving processing throughput. Data integrity is maintained through the mapping structure that ensures all SDU segments are properly reassembled when needed.
Solution Approach 2:
The patent transitions from storing entire TDUs as single units to a multi-dimensional storage approach where SDUs are distributed across multiple buffer entries. This dimensional change from monolithic TDU storage to distributed SDU storage enables parallel processing operations while maintaining logical data integrity through the mapping relationship that connects all segments.
Data Source
AI summary
Approaches, techniques, and mechanisms are disclosed for efficiently buffering data units within a network device. A traffic manager or other network device component receives Transport Data Units (“TDUs”), which are sub-portions of Protocol Data Units (“PDUs”). Rather than buffer an entire TDU together, the component divides the TDU into multiple Storage Data Units (“SDUs”) that can fit in SDU buffer entries within physical memory banks. A TDU-to-SDU Mapping (“TSM”) memory stores TSM lists that indicate which SDU entries store SDUs for a given TDU. Physical memory banks in which the SDUs are stored may be grouped together into logical SDU banks that are accessed together as if a single bank. The TSM memory may include a number of distinct TSM banks, with each logical SDU bank having a corresponding TSM bank. Techniques for maintaining inter-packet and intra-packet linking data compatible with such buffers are also disclosed.