Network Equipment Test Device Clock Emulation

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Solution Overview

Problem

Existing methods for testing network devices with different clocks are limited in simulating clock jitter, latency, and frequency changes over time, and require dedicated hardware for each clock, making them non-scalable.

Innovation Solution

A network equipment test device generates or obtains timing information and clock modification data to emulate multiple clocks using software and hardware, allowing for the simulation of various clock scenarios without needing dedicated hardware for each clock, by using a management network interface card to obtain timing information and apply frequency adjustment factors and phase offsets to generate emulated clock values.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If individual clock hardware is used in each device to generate clock values, then each device can generate its own clock values, but it does not allow for simulation of clock jitter, latency, or other effects related to changes in clock frequency and/or phase over time

Engineering Contradiction:
Improveclock simulation capabilityVSAvoidability to simulate clock effects
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent creates a virtual copy of clock hardware functionality through software emulation. Instead of using physical clock hardware for each device, the system uses a single physical clock source and software algorithms to generate multiple virtual clock signals with different characteristics (jitter, latency, frequency variations). This copying approach allows comprehensive clock effect simulation without requiring dedicated hardware for each clock source.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent dynamically changes clock parameters (frequency, phase, jitter characteristics) through software control. The system modifies clock signal parameters in real-time to simulate various clock behaviors and effects. This parameter-based approach enables flexible simulation of different clock scenarios without hardware modifications, allowing the same physical clock to exhibit multiple different characteristics.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If dedicated clock hardware is required for each clock, then each clock can be generated independently, but the solution is not scalable

Engineering Contradiction:
Improveclock generation independenceVSAvoidscalability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent makes a single physical clock hardware resource universal by using it to generate multiple virtual clock signals simultaneously. The clock emulation software allows one physical clock source to serve multiple functions, creating numerous virtual clocks with different characteristics. This multi-functionality approach eliminates the need for dedicated hardware for each clock, enabling the system to scale to many clock sources using a single physical clock.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges multiple clock generation functions into a single physical clock hardware resource. Instead of having separate hardware for each clock, the system combines all clock generation capabilities into one physical clock with software-based virtualization. This merging approach consolidates hardware resources while maintaining the ability to generate multiple independent clock signals through software.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If a stream of test packets is transmitted to simulate clock drift, then clock drift phenomena can be observed, but dedicated hardware for each clock is required

Engineering Contradiction:
Improveclock drift simulationVSAvoidhardware requirements
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces the mechanical/physical clock hardware system with a software-based clock emulation system. Instead of using multiple physical clock devices to simulate clock drift, the system uses software algorithms running on a single device to generate and manipulate clock signals. This substitution eliminates complex hardware requirements while maintaining the ability to simulate clock drift and other timing phenomena through software-controlled packet transmission.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentEP3284244B1Methods, systems, and computer readable media for emulating network devices with different clocks
Publication Date: 2019.12.18 KEYSIGHT TECH SINGAPORE (SALES) PTE LTD
  • EP3284244B1 patent drawingFigure 1
  • EP3284244B1 patent drawingFigure 2
  • EP3284244B1 patent drawingFigure 3

AI summary

The subject matter described herein relates to methods, systems, and computer readable media for emulating network devices with different clocks. One method includes steps occurring in a network equipment test device. The steps include generating or obtaining timing information. The steps further include obtaining clock modification information. The steps further include emulating a plurality of different clocks using the timing information and the clock modification information. The method further includes emulating at least one network device that transmits test packets to a device under test using the different clocks.