Network Clock Synchronization Using Multi-Cycle Slope Adjustment
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Solution Overview
Problem
In modern communication networks, especially those transitioning from synchronous time division multiplexing to asynchronous packet switching, achieving accurate time synchronization among network node devices is challenging due to differences in physical properties of clock signal generation units, leading to inaccuracies and potential system instability.
Innovation Solution
A time synchronization method involving multiple adjustment cycles, where a physical clock signal is generated with a frequency control word, and the clock slope approaches 1, allowing for precise calculation of physical time deviation, enabling accurate conversion to logical time and improving synchronization across network nodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional time synchronization methods are used in asynchronous packet switching networks, then device complexity is reduced, but time synchronization precision deteriorates due to physical property differences of clock signal generation units
Solution Approach 1:
The patent implements dynamic adjustment of clock signal parameters through multiple adjustment cycles. The clock slope is dynamically modified in each cycle to gradually approach the target value of 1, allowing the system to adapt to physical property differences of clock generation units and achieve precise time synchronization in asynchronous packet switching networks.
Solution Approach 2:
The patent performs preliminary determination of frequency control words and target clock slope values before the actual time synchronization process. By pre-calculating the required adjustment parameters and preparing the adjustment strategy, the system can efficiently achieve precise synchronization without excessive complexity during real-time operation.
2Measurement precision
If multiple adjustment cycles are implemented to improve clock slope accuracy, then time synchronization accuracy is improved, but adjustment process complexity increases
Solution Approach 1:
The patent divides the time synchronization process into multiple adjustment cycles, where each cycle focuses on refining the clock slope toward the target value. This segmentation allows the system to progressively improve accuracy through incremental adjustments, making the complex synchronization process more manageable and controllable.
Solution Approach 2:
The patent employs periodic adjustment cycles to refine the clock signal parameters. Each cycle performs measurement, calculation, and adjustment operations in a structured periodic manner, enabling systematic improvement of time synchronization accuracy while maintaining a organized adjustment process.
3Reliability
If clock frequency is adjusted to match reference clock signal, then time synchronization is improved, but system stability may be affected during adjustment transitions
Solution Approach 1:
The patent implements dynamic adjustment of clock frequency through multiple gradual cycles rather than abrupt changes. The clock slope is adjusted incrementally in each cycle to approach the target value, which maintains system stability during transitions while achieving reliable time synchronization with reference clock signals.
Data Source
AI summary
This is provided a time synchronization method, including: an adjustment stage including N adjustment cycles, N being an integer greater than 1; in each adjustment cycle, generating a physical clock signal at least according to a pre-acquired frequency control word corresponding to the adjustment cycle, and obtaining logical time at least according to the physical clock signal and a physical time deviation; a clock slope of the physical clock signal generated in each adjustment cycle reaches its corresponding target value, and the target values of the clock slopes of the physical clock signals in the N adjustment cycles gradually approach 1; the physical time deviation is: a time difference between the reference time and the physical time corresponding to the physical clock signal in an Nth adjustment cycle at the end of the Nth adjustment cycle. A time synchronization device and a network node device are provided.