Synchronous Network Device Clock Synchronization Module

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Solution Overview

Problem

Existing synchronous network devices face challenges in effectively synchronizing clocks across multiple ports, leading to latency and variability due to network congestion and differing clock qualities, which can disrupt data transmission accuracy.

Innovation Solution

A physical layer device with a clock synchronization module that receives a grandmaster clock from one port, cleans it by removing jitter and controlling voltage swing, and distributes it to other ports for synchronized data transmission, using a programmable approach that can establish synchronous master/slave relationships dynamically or manually.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single port receives the grandmaster clock in existing synchronous network devices, then clock synchronization can be established, but latency and variability increase due to network congestion and differing clock qualities across multiple ports

Engineering Contradiction:
Improveclock synchronization accuracyVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The device segments the clock distribution function by assigning different roles to different ports: one port receives the grandmaster clock while other ports transmit data using cleaned-up clock signals. This segmentation allows the system to handle clock synchronization and data transmission separately, reducing latency and variability in the data transmission path.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The clock synchronization module acts as an intermediary between the port receiving the grandmaster clock and the other ports. It cleans up the clock signal by removing jitter and controlling voltage swing before distributing it to other ports, thereby improving clock synchronization accuracy while maintaining low latency in data transmission.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If network congestion occurs in existing synchronous network devices, then data transmission can continue, but clock synchronization quality deteriorates leading to variability

Engineering Contradiction:
Improvedata transmission efficiencyVSAvoidclock synchronization quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The clock synchronization module serves as a protective intermediary that isolates the data transmission path from network congestion effects. By cleaning up the clock signal locally and controlling voltage swing, it maintains clock synchronization quality even when network congestion occurs, ensuring reliable data transmission.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs clock signal cleaning and voltage swing control before the clock signal is distributed to other ports. This beforehand cushioning prevents jitter and variability from affecting data transmission, allowing continuous efficient data transmission even during network congestion.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Adaptability or versatility

If different clock qualities are received across multiple ports, then network connectivity is maintained, but data transmission accuracy is disrupted

Engineering Contradiction:
Improvenetwork connectivityVSAvoiddata transmission accuracy
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The device applies local quality control by cleaning up the clock signal specifically at the port receiving the grandmaster clock, and then distributing this cleaned-up signal to other ports. This ensures that each port operates with consistent clock quality, maintaining data transmission accuracy while preserving network connectivity across all ports.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The clock synchronization module acts as a quality-control intermediary that standardizes clock signals before they are distributed to other ports. This mediation ensures that even if different clock qualities are received across multiple ports, the data transmission accuracy is maintained through centralized clock signal cleaning and voltage swing control.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9054823B2Synchronous network device
Publication Date: 2015.06.09 MARVELL ASIA PTE LTD
  • US9054823B2 patent drawing
  • US9054823B2 patent drawing
  • US9054823B2 patent drawing

AI summary

A networking device includes a plurality of network ports and a clock synchronizer. Each network port is configured to receive a respective signal over a respective physical medium. A selected network port is configured to recover a clock signal from the respective signal received by the selected network port. Each of the network ports is configured to be selectable as the selected network port. The clock synchronizer is configured to generate a transmit clock signal in response to the clock signal recovered by the selected network port. The selected network port is configured to transmit data over the respective physical medium according to a local clock signal generated by a clock signal generator local to the networking device. Each network port other than the selected network port is configured to transmit data over the respective physical medium according to the transmit clock signal generated by the clock synchronizer.