Network Device Port Aggregation with Shared Logic

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Solution Overview

Problem

Current network devices lack efficient configurations to operate at varying speeds and modes, leading to suboptimal performance in handling network communications, particularly in cloud computing environments where flexible and high-speed data transfer is crucial.

Innovation Solution

A network device with multiple ports that can operate in two modes: as a single port at a first speed or as independent ports at a second speed, utilizing shared memory and error correction modules to manage and correct data across these modes, enabling efficient data processing and transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If multiple ports are configured to operate as independent ports at high speed, then data transfer speed is improved, but device complexity increases

Engineering Contradiction:
Improvedata transfer speedVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent merges multiple port operations into shared functional blocks including a common error correction code module, shared memory device, and receive port selector. This consolidation allows multiple ports to operate independently at high speeds while sharing common processing resources, thereby reducing overall device complexity while maintaining high data transfer speeds

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements universal components that serve multiple ports simultaneously. The error correction code module, shared memory device, and receive port selector are designed as multi-functional elements that can handle operations for any of the multiple ports, reducing the need for dedicated components for each port and thereby simplifying the device architecture

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If multiple ports are configured as a single port to reduce complexity, then device complexity is reduced, but adaptability to different network modes is worsened

Engineering Contradiction:
Improvedevice complexityVSAvoidoperational mode flexibility
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic configurability where the network device can switch between operating modes (single port mode and multiple independent ports mode) based on network conditions. The receive port selector and shared memory device are designed to adapt their operation dynamically, allowing the same hardware architecture to serve both low-complexity and high-adaptability requirements

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses universal components that can operate in multiple configurations. The error correction code module, shared memory device, and receive port selector are designed to function whether ports are aggregated or independent, providing operational mode flexibility without requiring separate dedicated hardware for each mode

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If shared memory and error correction modules are used, then device complexity is reduced, but data processing speed may be worsened due to sharing resources

Engineering Contradiction:
Improvedevice complexityVSAvoiddata processing speed
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent ensures continuous data processing through the shared memory device and error correction code module by implementing efficient data flow management. The receive port selector continuously directs data to the shared memory device, and the error correction code module continuously processes data, ensuring that the shared resources do not become bottlenecks and maintaining high data processing speed despite resource sharing

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS9588839B1Methods and systems for using shared logic at network devices
Publication Date: 2017.03.07 MARVELL ASIA PTE LTD
  • US9588839B1 patent drawing
  • US9588839B1 patent drawing
  • US9588839B1 patent drawing

AI summary

Methods and systems for network devices is provided. In one aspect, a network device includes a plurality of ports, where the plurality of ports are configured to operate in a first operating mode as a single port at a first speed and in a second operating mode where each of the plurality of ports operate as an independent port at a second operating speed; a shared memory device for staging information received from a network for the plurality of ports operating in the first operating mode and the second operating mode; a receive port selector that selects information from the shared memory device when the plurality of ports are operating in the second operating mode; and a shared error correction code module for decoding and performing error correction on information received via the network for the first operating mode and the second operating mode.