Network FIFO for High-Throughput Asynchronous Communication

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Solution Overview

Problem

High-latency communication channels in computational networks result in low throughput due to large cycle times, leading to potential data loss or corruption, as senders may send data before receiving acknowledge tokens, causing bottlenecks in data transfer.

Innovation Solution

Implementing a system with sender and receiver FIFO buffers and communication channels that operate collectively as a network FIFO, initialized with specific token configurations to ensure reliable asynchronous communication, where the sender and receiver manage tokens to prevent data loss and optimize cycle times, allowing for higher throughput without unnecessary waiting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the sender waits for acknowledge tokens before sending data, then data reliability is improved, but throughput deteriorates due to large cycle times

Engineering Contradiction:
Improvedata reliabilityVSAvoidthroughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the communication protocol into independent data transmission and acknowledgment phases. Multiple data items can be transmitted in the forward channel while acknowledgments travel independently in the reverse channel, allowing parallel processing and eliminating the need for sequential wait cycles.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system maintains continuous data flow by allowing the sender to transmit multiple data items continuously while acknowledgments are processed independently. The FIFO buffers ensure continuous operation without idle waiting periods, keeping both forward and reverse channels actively utilized.

Inventive Principle:
Principle #20Continuity of useful action

2Productivity

If the sender sends data before receiving acknowledge tokens, then throughput is improved, but data loss or corruption occurs

Engineering Contradiction:
ImprovethroughputVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

FIFO buffers are introduced as intermediary storage elements between the sender and receiver. These buffers temporarily hold data items and acknowledgment tokens, ensuring that data is not lost even when transmission speeds differ. The buffers act as mediators that decouple the sender and receiver operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The FIFO buffers are pre-configured with specific capacities to hold sufficient data items and acknowledgments. This preliminary capacity allocation ensures that the sender can continuously transmit data without immediate acknowledgment, while the receiver can process data at its own pace without data loss.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If FIFO buffers are initialized with sufficient tokens, then asynchronous communication reliability is improved, but device complexity increases

Engineering Contradiction:
Improveasynchronous communication reliabilityVSAvoidbuffer initialization complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent specifies concrete parameter values for FIFO buffer capacities (e.g., minimum and maximum token counts) that can be directly implemented. By defining specific numerical parameters rather than abstract concepts, the complexity is reduced to straightforward configuration values that maintain reliability without requiring complex control logic.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7417993B1Apparatus and method for high-throughput asynchronous communication
Publication Date: 2008.08.26 ORACLE AMERICAN INC
  • US7417993B1 patent drawing
  • US7417993B1 patent drawing
  • US7417993B1 patent drawing

AI summary

One embodiment of the present invention provides a system for high-throughput asynchronous communication that includes a sender and a receiver. A sender's first-in, first-out (FIFO) buffer is coupled to an input of the sender, a receiver's FIFO buffer is coupled to an input of the receiver, a forward communication channel is coupled between the sender and the receiver's FIFO buffer, and a reverse communication channel is coupled between the receiver and the sender's FIFO buffer. The forward communication channel, the receiver's FIFO buffer, the reverse communication channel, and the sender's FIFO buffer operate collectively as a network FIFO between the sender and the receiver. The network FIFO is configured to ensure that asynchronous communication between the sender and the receiver takes place reliably and without unnecessary waiting by the sender or the receiver.