Network Frame Arbitration Circuit for Low Latency

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Solution Overview

Problem

Current communication systems face challenges in achieving low latency and deterministic frame forwarding for time-sensitive applications, particularly in industrial control and real-time communication over Ethernet networks, due to high buffering needs and non-blocking forwarding mechanisms.

Innovation Solution

The implementation of a network device with a priority-based multiplexing and occupancy-based arbitration system, which includes a multiplexer circuit and an arbitration circuit that compares frame priorities and buffer occupancies to generate forwarding data, allowing for efficient multiplexing and arbitration of frames across multiple ports, thereby reducing latency and buffering needs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If traditional buffering and forwarding mechanisms are used, then network devices can handle multiple streams, but latency increases and deterministic forwarding cannot be guaranteed for time-sensitive applications

Engineering Contradiction:

ImprovelatencyVSAvoiddeterministic forwarding

Core Design Contradiction:

Loss of timeVSReliability

Solution Approach 1:

The patent segments frames into smaller data beats (e.g., 64-byte units) that can be independently buffered and forwarded. This segmentation allows the arbitration circuit to make fine-grained forwarding decisions for individual data beats rather than waiting for entire frames, thereby reducing latency while maintaining deterministic forwarding for time-sensitive streams through priority-based arbitration of these segmented units.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic buffering where the arbitration circuit continuously monitors buffer occupancy and frame priorities, adjusting forwarding decisions in real-time. The system dynamically switches between different buffering modes (blocking vs. non-blocking) based on stream priority and buffer status, enabling low-latency forwarding for high-priority time-sensitive applications while maintaining reliability through adaptive control.

Inventive Principle:

Principle #15Dynamics

2Quantity of substance

If high buffering capacity is provided to handle multiple streams, then more data can be stored, but device complexity and resource requirements increase

Engineering Contradiction:

Improvebuffering capacityVSAvoidbuffering requirements

Core Design Contradiction:

Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent merges multiple stream buffers into a shared buffering resource managed by a priority-based arbitration circuit. Instead of providing separate buffering capacity for each stream, the system uses a single shared buffer pool where the arbitration circuit dynamically allocates buffer space based on stream priority and current occupancy, thereby reducing overall buffering requirements while maintaining the ability to handle multiple time-sensitive streams.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent changes the buffering parameter from fixed per-stream allocation to dynamic shared allocation with priority-based arbitration. The arbitration circuit monitors buffer occupancy parameters and adjusts forwarding decisions based on real-time conditions, allowing the system to achieve high buffering efficiency with reduced total buffer capacity by exploiting temporal and spatial multiplexing of different streams.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If priority-based multiplexing is implemented, then deterministic forwarding for high-priority traffic is achieved, but arbitration complexity increases

Engineering Contradiction:

Improvedeterministic forwardingVSAvoidarbitration mechanism

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements preliminary classification of frames into priority levels and pre-configuration of arbitration rules before actual forwarding occurs. The arbitration circuit is pre-programmed with priority schemes and buffer occupancy thresholds, allowing it to make deterministic forwarding decisions for high-priority traffic through simple comparison logic rather than complex real-time analysis, thereby achieving reliability with controlled complexity.

Inventive Principle:

Principle #10Preliminary action

4Reliability

If blocking forwarding is used to ensure deterministic behavior, then reliability improves, but latency increases for time-sensitive applications

Engineering Contradiction:

Improvedeterministic behaviorVSAvoidlatency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS10541934B1Systems and methods for frame buffering and arbitration in a network

Publication Date: 2020.01.21 XILINX INC

AI summary

A network device includes a first port, a second port, a third port, and an arbitration circuit. The arbitration circuit is configured to receive a first frame and a second frame. The first frame is received from the first port and to be forwarded to the third port. The second frame is received from the second port and to be forwarded to the third port. The arbitration circuit compares a first priority of the first frame and a second priority of the second frame to generate a first comparison result. In response to the first comparison result, first forwarding data is generated based on the first and second frames. The first forwarding data is sent to an output of the arbitration circuit.