Network Interface Controller Offloads Data Processing to Hardware Logic Devices

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Solution Overview

Problem

In large cloud computing systems, efficiently distributing workload and computing functions among various computing systems is challenging due to uneven resource utilization, where some parts become overloaded while others have unused capacity, complicating network service chaining and data transmission.

Innovation Solution

A method and system that utilizes a network interface device controller to detect memory transaction requests and transmit peer-to-peer messages to hardware logic devices, enabling them to process data and generate additional data, thereby optimizing data transmission and processing within information handling systems using remote direct memory access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If software-defined networking is used to create service chains, then network flexibility and programmability are improved, but device complexity and workload distribution challenges worsen

Engineering Contradiction:
Improvenetwork flexibilityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces a network interface device controller as an intermediary component that mediates between the software-defined networking control plane and the hardware logic devices. This controller handles the complexity of service chain management, packet routing decisions, and coordination between virtualized network functions, thereby maintaining network flexibility while offloading computational complexity from the main processing systems.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the network processing functions by separating the control plane (software-defined networking controller) from the forwarding plane (hardware logic devices). This segmentation allows the control plane to maintain flexibility and programmability for service chain management, while the forwarding plane handles high-speed packet processing, thus managing device complexity through functional decomposition.

Inventive Principle:
Principle #1Segmentation

2Productivity

If hardware logic devices are used for data processing, then processing speed and efficiency are improved, but system complexity and coordination overhead worsen

Engineering Contradiction:
Improveprocessing speedVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the network interface device controller with the hardware logic devices into an integrated system. The controller is directly coupled to the hardware logic devices, enabling tight coordination and efficient data flow. This merging reduces coordination overhead by eliminating external communication interfaces while maintaining high processing speed through unified control and execution.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The hardware logic devices are designed to autonomously execute processing tasks based on instructions from the controller, handling their own data processing operations without requiring constant external intervention. This self-service capability reduces system complexity by minimizing the coordination mechanisms needed while maintaining high processing speed through autonomous operation.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10560527B2Network service chains using hardware logic devices in an information handling system
Publication Date: 2020.02.11 DELL PROD LP
  • US10560527B2 patent drawing
  • US10560527B2 patent drawing
  • US10560527B2 patent drawing

AI summary

A method, an information handling system (IHS), an IHS and a network interface system for transmitting data in an IHS. The method includes detecting, via a network interface device controller of a first IHS, a first memory transaction request from a second IHS to a first system memory of the first IHS. A plurality of first data associated with the first memory transaction request is received. A first peer to peer message is transmitted to a hardware logic device (HLD). The first peer to peer message includes a first action for the HLD. The HLD is triggered to process the first data according to the first action such that the HLD generates a plurality of second data.