Network Interface Message Driven Prefetching for CPU Stall Reduction

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Solution Overview

Problem

In distributed computing systems employing a function shipping model, parallel data-intensive applications experience significant CPU stalls due to random access patterns in large data sets, which hinder the realization of benefits from fast messaging with zero-copy optimizations, as cache misses are common and unpredictable data references lead to prolonged memory access times.

Innovation Solution

Implementing a message-driven prefetching mechanism at the network interface, where incoming messages trigger the prefetching of referenced data into a local cache, using configuration registers to compute the physical address and extent of the data, and a cache prefetcher to initiate the prefetch operation, thereby reducing CPU stalls and improving memory latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If fast messaging with zero-copy optimizations is used, then network bandwidth usage and latency are improved, but CPU stalls occur due to cache misses from random data access patterns

Engineering Contradiction:
Improvenetwork messaging speedVSAvoidCPU stall time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The system performs preliminary data prefetching into the cache hierarchy before the CPU actually needs the data. When a message is received at the network interface, the system extracts data references from the message and initiates prefetching operations to load the referenced data into cache memory in advance, so that when the CPU processes the message, the data is already available and no stalls occur.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If data is accessed randomly in large data sets, then data processing flexibility is improved, but cache hit rate decreases leading to prolonged memory access times

Engineering Contradiction:
Improvedata access flexibilityVSAvoidmemory access time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The system extracts data references from incoming messages at the network interface and initiates prefetching operations before the CPU needs the data. This preliminary action loads the randomly accessed data into the cache hierarchy in advance, maintaining data access flexibility while reducing memory access time by ensuring data is available in cache when needed.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If prefetching is performed at the processor level, then data availability is improved, but processor productivity decreases due to stalled cycles

Engineering Contradiction:
Improvedata availabilityVSAvoidprocessor throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system uses the network interface as an intermediary to perform prefetching operations. Instead of the processor directly initiating prefetches (which would stall it), the network interface extracts data references from incoming messages and triggers prefetching operations autonomously. This transfers the prefetching burden from the processor to the network interface, maintaining data availability while preserving processor productivity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system enables the network interface to autonomously perform prefetching operations without requiring processor intervention. The network interface extracts data references from messages and automatically initiates prefetching into the cache hierarchy, allowing the system to service its own data needs without stalling the processor.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9535842B2System and method for performing message driven prefetching at the network interface
Publication Date: 2017.01.03 ORACLE INT CORP
  • US9535842B2 patent drawing
  • US9535842B2 patent drawing
  • US9535842B2 patent drawing

AI summary

Each computing node of a distributed computing system may implement a hardware mechanism at the network interface for message driven prefetching of application data. For example, a parallel data-intensive application that employs function shipping may distribute respective portions of a large data set to main memory on multiple computing nodes. The application may send messages to one of the computing nodes referencing data that is stored locally on the node. For each received message, the network interface on the recipient node may extract the reference, initiate the prefetching of referenced data into a local cache (e.g., an LLC), and then store the message for subsequent interpretation and processing by a local processor core. When the processor core retrieves a stored message for processing, the referenced data may already be in the LLC, avoiding a CPU stall while retrieving it from memory. The hardware mechanism may be configured via software.