Network Interface Peripheral Direct Network Access
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Solution Overview
Problem
Current systems lack mechanisms for peer peripherals to transmit and receive data on a network via a peripheral implementing the network interface using a schedule, limiting direct network access for scheduled data transfers.
Innovation Solution
A network interface peripheral device with buffers for data handling and a scheduler that generates timed events for data transmission and reception, enabling peer peripherals to exchange data directly over the network according to a schedule, using a data handler to manage data between buffers and the network.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If peer peripherals use traditional memory-mapped interconnect for network data transfer, then data exchange between CPU and peripherals is maintained, but direct network access by peer peripherals is limited and cycle time increases
Solution Approach 1:
The data transfer mechanism is segmented into multiple independent paths: a first data path for CPU-to-peripheral transfers and a second data path for direct peer-to-peer peripheral transfers. This segmentation allows simultaneous operation of different transfer types, enabling peer peripherals to access the network directly without waiting for CPU intervention, thereby reducing cycle time while maintaining manageable complexity through specialized dedicated paths.
Solution Approach 2:
The memory-mapped interconnect acts as an intermediary that enables direct peer-to-peer data transfer between peripherals and the network interface without CPU involvement. This intermediary structure allows peripherals to bypass the traditional CPU-mediated transfer path and communicate directly with the network, reducing cycle time while the interconnect itself manages the complexity of coordinating these transfers.
2Reliability
If scheduled data transfer is implemented without direct peripheral network access, then network data transmission occurs, but synchronization timing and real-time performance are degraded
Solution Approach 1:
The system implements preliminary scheduling of data transfers where the host computer pre-configures transfer parameters including timing, data size, and priority levels before actual data transfer occurs. This preliminary action establishes a predetermined schedule that peer peripherals follow, ensuring synchronization timing is maintained while the ease of operation is preserved through automated execution of pre-planned transfer sequences without requiring complex real-time configuration.
Solution Approach 2:
The data transfer system operates on periodic intervals with scheduled transfer slots allocated to different peer peripherals. This periodic action ensures that synchronization timing is maintained through regular, predictable transfer cycles while simplifying operation through automated periodic execution rather than requiring complex manual timing coordination. The network interface peripheral automatically initiates transfers at scheduled times according to the predetermined schedule.
Data Source
AI summary
A network interface peripheral device (NIP) may include a network interface for communicating with a network, and an interconnect interface for communicating with a processor subsystem. First buffers in the NIP may hold data received from and/or distributed to peer peripherals by the NIP, and second buffers may hold payload data of scheduled data streams transmitted to and/or received from the network by the NIP. Payload data from the data in the first buffers may be stored in the second buffers and transmitted to the network according to transmit events generated based on a received schedule. Data may be received from the network according to receive events generated based on the received schedule, and distributed from the second buffers to the first buffers. A centralized system configuration entity may generate the schedule, manage configuration of the NIP, and coordinate the internal configuration of the NIP with a network configuration flow.