Network Interface Unit Asymmetric Session Mapping

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Solution Overview

Problem

Existing network systems face inefficiencies due to generic I/O treatment, leading to constraints in network throughput, latency, session rate, and processing overhead, with scalability issues and bottlenecks preventing linear scaling and effective resource allocation.

Innovation Solution

A method and apparatus for mapping sessions to preassigned processing entities in a network system, utilizing a network interface unit connected to multiple processing entities and memory units, with a packet classifier and scheduling control modules to asymmetrically allocate resources, enabling efficient packet processing and interrupt event notification.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If generic I/O treatment is used for network interface functionality, then system generality and modularity are improved, but network throughput, latency, and processing efficiency deteriorate

Engineering Contradiction:
Improvesystem generalityVSAvoidnetwork throughput
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The network interface functionality is segmented into multiple queues, with each queue assigned to specific processing entities. This segmentation allows the system to maintain generality through a unified I/O framework while achieving network-specific optimizations through dedicated processing paths for different traffic types.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different queues are assigned different processing entities based on their specific requirements. High-priority traffic receives dedicated processing resources, while lower-priority traffic shares resources. This local quality approach optimizes throughput and latency for critical network functions without sacrificing overall system generality.

Inventive Principle:
Principle #3Local quality

2Productivity

If multiple processors service a network interface with shared queues, then processing power is improved, but coordination overhead and difficulty in achieving processor-session affinity worsen

Engineering Contradiction:
Improveprocessing powerVSAvoidcoordination overhead
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The shared queue is segmented into multiple dedicated queues, with each queue assigned to specific processing entities. This eliminates the need for complex coordination mechanisms while maintaining multi-processor utilization, as each processor has dedicated work to perform without requiring locks or synchronization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each processing entity services its assigned queue independently without requiring coordination with other processors. The system achieves scalable processing power through this self-service model, where each processor autonomously manages its queue, eliminating coordination overhead and achieving natural processor-session affinity.

Inventive Principle:
Principle #25Self-service

3Adaptability or versatility

If network interface functionality is treated as undifferentiated general purpose I/O, then system modularity is improved, but network-specific optimizations and functional efficiency deteriorate

Engineering Contradiction:
Improvesystem modularityVSAvoidfunctional efficiency
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The network interface controller maintains a unified I/O architecture that can handle multiple network protocols and traffic types, preserving modularity. Within this universal framework, specific queues are optimized for different network functions, achieving both generality and network-specific efficiency through multi-functionality.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

While maintaining overall system modularity, the patent applies local quality optimizations to specific queue-processing entity assignments. Critical network functions receive dedicated processing resources with optimized pathways, while less critical functions share resources, achieving functional efficiency without sacrificing modular architecture.

Inventive Principle:
Principle #3Local quality

4Adaptability or versatility

If resources are allocated dynamically without preassignment, then system adaptability is improved, but processing overhead and latency worsen

Engineering Contradiction:
Improvesystem adaptabilityVSAvoidprocessing latency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

Processing entities are preassigned to specific queues during system initialization based on expected traffic patterns and performance requirements. This preliminary action eliminates runtime decision-making overhead, reducing processing latency while maintaining adaptability through the ability to reassign queues to different processing entities as needed.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7889734B1Method and apparatus for arbitrarily mapping functions to preassigned processing entities in a network system
Publication Date: 2011.02.15 ORACLE AMERICAN INC
  • US7889734B1 patent drawing
  • US7889734B1 patent drawing
  • US7889734B1 patent drawing

AI summary

A method and apparatus for mapping sessions to preassigned processing entities in a network system. A network interface unit is operably connected to a plurality of processing entities and a plurality of memory units that define a shared memory space. The network interface unit further comprises a memory access module that includes a plurality of memory access channels, a packet classifier, and a plurality of scheduling control modules that are operable to control processing of data transported by the network. In various embodiments of the invention, predetermined subsets of the plurality of processing entities are operably associated with predetermined subsets of the plurality of memory units thereby defining a plurality of asymmetrical data processing partitions. The packet classifier is operable to provide an association between packets and the plurality of asymmetrical data processing partitions based upon an association with a predetermined session. In various embodiments of the invention, the asymmetrical data processing partitions can comprise a plurality of processor cores, a single processor core, a combination of strands of an individual processor core or a single strand of an individual processor core. The asymmetrical data processing partitions are scalable by adding additional processing entities.