Network-Attached Memory for Flash Cache Coherency

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Solution Overview

Problem

Existing system software solutions for servers do not provide mechanisms for using flash memory beyond disk storage.

Innovation Solution

Implementing a hyper-kernel that dynamically optimizes the use of cache memory and virtual processor placement, enabling resource migration and cache coherency in a network-attached memory system, allowing flash memory to be utilized for purposes beyond disk storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If flash memory is used only as disk storage in existing system software solutions, then device compatibility is maintained, but memory utilization efficiency is limited

Engineering Contradiction:
Improveflash memory usage flexibilityVSAvoidsystem performance
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent enables flash memory to serve multiple functions beyond traditional disk storage by implementing a network-attached memory system. The flash memory can be dynamically allocated as cache memory, virtual memory, or storage depending on system needs, allowing a single storage medium to fulfill multiple roles and significantly improving overall memory utilization efficiency

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system implements dynamic resource allocation where flash memory resources can be migrated and reassigned based on real-time system demands. The memory management system can dynamically convert flash storage into cache memory or virtual memory spaces, allowing the memory hierarchy to adapt flexibly to changing workload requirements and optimize system performance

Inventive Principle:
Principle #15Dynamics

2Productivity

If flash memory is used for purposes beyond disk storage, then memory utilization efficiency is improved, but system complexity increases

Engineering Contradiction:
Improvememory utilization efficiencyVSAvoidsystem software complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces a network-attached memory system as an intermediary layer between the processor and flash storage devices. This intermediary manages the complexity of multi-functional flash memory usage by handling resource allocation, cache management, and virtual memory operations, thereby simplifying the overall system architecture while enabling advanced memory utilization

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system creates virtual copies of memory spaces in the network-attached memory system, allowing flash memory to be presented as different types of memory (cache, virtual memory, storage) through software abstraction. This copying approach enables multiple memory functions without requiring separate physical memory devices, reducing hardware complexity while improving memory utilization

Inventive Principle:
Principle #26Copying

3Adaptability or versatility

If resource migration is implemented in network-attached memory system, then system adaptability is improved, but resource management complexity increases

Engineering Contradiction:
Improveresource allocation flexibilityVSAvoidresource management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism in the resource management system that continuously monitors system performance, memory access patterns, and resource utilization. Based on this feedback, the system automatically makes decisions about resource migration and allocation, reducing the need for complex manual management while maintaining high adaptability to changing system conditions

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12445532B2Network attached memory using selective resource migration
Publication Date: 2025.10.14 HEWLETT PACKARD ENTERPRISE DEV LP
  • US12445532B2 patent drawing
  • US12445532B2 patent drawing
  • US12445532B2 patent drawing

AI summary

Maintaining cache coherency in the presence of a network attached memory is disclosed. A computer system includes a plurality of physical nodes. An operating system is run collectively across the plurality of physical nodes. The physical nodes are configured to communicate with a network attached memory. Based at least in part on an operation to be performed with respect to page on a first physical node included in the plurality of physical nodes, the network attached memory is configured to receive a message. The network attached memory is configured to perform an action based at least in part on the received message.