Network Processor Interrupt Buffer Prioritization and Policing

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Solution Overview

Problem

Conventional data network nodes face interrupt-buffer overflow issues due to the inability to process hardware interrupts quickly enough, leading to dropped events and potential catastrophic failures, especially for critical events like counter overflows.

Innovation Solution

Implementing a method to classify events and allocate memory in a hardware interrupt buffer based on event categories, with fallback actions such as software interrupts or packet reprocessing to handle events that cannot be stored in the hardware buffer, ensuring continuous processing and preventing buffer overflow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the control plane processes hardware interrupts on a first-in, first-out basis without prioritization, then the interrupt buffer management is simple, but critical events may be dropped when the buffer overflows

Engineering Contradiction:
Improveevent handling reliabilityVSAvoidinterrupt buffer management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The interrupt buffer is segmented into multiple priority levels (first priority buffer, second priority buffer, etc.), where each buffer stores interrupts of a specific priority. This segmentation allows critical events to be separated from non-critical events, ensuring that even when the buffer is full, high-priority interrupts are preserved and processed first, thereby improving event handling reliability without requiring complete redesign of the buffer management system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the interrupt buffer system are assigned different qualities based on event priority. High-priority interrupts receive preferential treatment through dedicated buffer space and priority-based processing, while lower-priority interrupts share remaining capacity. This local quality differentiation ensures that critical events maintain high reliability while the overall system complexity remains manageable through structured organization.

Inventive Principle:
Principle #3Local quality

2Reliability

If the interrupt buffer size is increased to prevent overflow, then event dropout is reduced, but the memory usage and system resource consumption increase

Engineering Contradiction:
Improveinterrupt processing reliabilityVSAvoidmemory resource consumption
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The interrupt buffer allocation is made dynamic through priority-based management. Instead of allocating fixed large buffer space for all interrupts, the system dynamically allocates buffer capacity based on event priority and current system state. High-priority interrupts are guaranteed a portion of the buffer, while lower-priority interrupts use remaining capacity. This dynamic approach maintains high reliability for critical events while optimizing memory resource consumption by not dedicating excessive memory to non-critical interrupts.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of buffer allocation from a static uniform allocation to a dynamic priority-weighted allocation. By introducing priority levels and associated allocation ratios, the same physical buffer memory serves multiple purposes with different guarantees. This parameter change allows the system to achieve high reliability for critical events without proportionally increasing total memory usage, as the buffer is efficiently utilized based on actual event priorities.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If all events are handled through hardware interrupts, then event processing is systematic, but the control plane becomes overwhelmed and processing speed decreases

Engineering Contradiction:
Improveevent processing throughputVSAvoidcontrol plane processing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

Non-critical events are extracted from the hardware interrupt processing path and handled through alternative mechanisms such as polling or deferred processing. This extraction reduces the burden on the control plane, allowing it to focus on high-priority interrupts while maintaining systematic processing for critical events. The result is improved overall throughput as the control plane is no longer overwhelmed by all events, and critical events still receive timely attention.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

An intermediary priority-based buffer management system is introduced between event detection and control plane processing. This intermediary classifies events into priority levels and manages buffer allocation accordingly, filtering and organizing interrupts before they reach the control plane. This mediator prevents the control plane from being overwhelmed by unfiltered event streams, improving processing throughput while ensuring critical events are systematically handled with appropriate timing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8930604B2Reliable notification of interrupts in a network processor by prioritization and policing of interrupts
Publication Date: 2015.01.06 INTEL CORP
  • US8930604B2 patent drawing
  • US8930604B2 patent drawing
  • US8930604B2 patent drawing

AI summary

In a data network, a node determines whether to handle data-dependent events using the node's hardware interrupt buffer or instead using an available fallback action. The node classifies each detected event as being one of a plurality of different categories of events and determines, based on the classified category, whether to handle the detected event using the hardware interrupt buffer of the node. Each different event category can be assigned its own scale factor, where the available (i.e., currently unused) capacity of the hardware interrupt buffer is allocated based on those programmed scale factors. If the node determines to handle the detected event using the hardware interrupt buffer, then the node stores a hardware interrupt corresponding to the detected event in the hardware interrupt buffer. Otherwise, the node handles the detected event using a fallback action.