Network Status Measuring System for Bottleneck Detection
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Solution Overview
Problem
Digital data networks often experience bottlenecks and unbalanced topologies, leading to lag, and existing methods struggle to effectively locate these issues and present network status information efficiently.
Innovation Solution
A network status measuring system that uses a processor, display circuitry, and graphic generating circuitry to create a graphical representation of bit rate and latency by displaying objects on a network schematic, with object number, velocity, and size calculated based on measured values, allowing for high-density information display and reducing processing power by focusing on potential bottleneck links.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If traditional tables are used to display bit rates and latencies, then complete information can be presented, but the display area required is large
Solution Approach 1:
The patent transforms tabular data into a spatial visual representation where network links are depicted as graphical elements with objects positioned along them. The number of objects represents bit rate, their position represents latency, and their visual characteristics encode additional metrics. This dimensional transformation allows comprehensive network status information to be displayed in a compact graphical format rather than requiring extensive tabular space.
2Loss of information
If all links in the network are processed to generate graphical representations, then complete network status is captured, but processing power is consumed
Solution Approach 1:
The patent implements a discriminator that identifies and processes only those network links exhibiting potential bottleneck conditions based on measured bit rates and latencies. Instead of uniformly processing all links, the system applies different processing intensity to different parts of the network - focusing computational resources on problematic areas while skipping normal links. This selective processing reduces overall computational load while maintaining detection of critical issues.
3Measurement precision
If detailed information about each link is displayed, then measurement precision is high, but the device complexity increases
Solution Approach 1:
The patent combines multiple network metrics (bit rate, latency, and other performance indicators) into a single integrated graphical representation along each network link. Instead of displaying separate visual elements for each metric, the system merges them into a unified visual language where objects positioned along links simultaneously encode multiple parameters. This consolidation maintains comprehensive measurement precision while reducing the complexity of the display system and user interpretation.
Data Source
AI summary
A network status measuring system comprising a processor; a display circuitry configured to display a schematic overview of the network; a data traffic measuring circuitry configured to measure bit rate and latency on links of the network; and a graphic generating circuitry configured to generate a graphical representation of a bit rate and a latency measured on a particular link of the network by generating objects to be displayed at the particular link of the network in connection with the schematic overview of the network. The processor is further configured to calculate a number of the objects to be displayed at the particular link of the schematic overview of the network based on the bit rate measured on the particular link of the network. The display circuitry is further configured to display the generated objects at the particular link of the schematic overview of the network.