Network Terminal Clock Control for Low Power Waiting Mode
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Solution Overview
Problem
Conventional network terminals consume excessive power in waiting modes due to the need for continuous operation of oscillator circuits and decoding circuits, which limits power savings.
Innovation Solution
A network terminal design that includes an oscillator circuit, a communication processing unit, a controller unit, and a signal detecting unit configured to monitor wave detection signals without using the clock, allowing the oscillator circuit to be stopped or operate at low frequency during waiting modes, and start oscillating only when a threshold is exceeded, enabling efficient power management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the oscillator circuit and decoding circuits are kept operating continuously to monitor for activation signals, then the network terminal can respond quickly to communication events, but the electric power consumption increases significantly
Solution Approach 1:
The patent divides the monitoring function into two separate circuits: a simple threshold circuit that operates without clock and a full decoding circuit that requires clock. The threshold circuit segments the signal processing task by performing initial filtering in advance, allowing the system to respond to communication events while minimizing power consumption by keeping the heavy decoding circuit off during waiting mode.
Solution Approach 2:
The threshold circuit performs preliminary action by pre-filtering the received signals and generating activation signals in advance before the full decoding circuit is activated. This preliminary processing allows the system to be ready for quick response while maintaining low power consumption during the waiting period, as the threshold circuit can operate independently without requiring the clock signal.
2Speed
If the oscillator circuit operates at high frequency to ensure fast communication processing, then the communication speed is improved, but the power consumption during waiting mode cannot be sufficiently reduced
Solution Approach 1:
The patent implements dynamic clock control where the oscillator circuit frequency and operation state are adjusted based on system needs. During waiting mode, the oscillator operates at low frequency or stops completely. When communication events are detected by the threshold circuit, the oscillator frequency increases and the full decoding circuit is activated. This dynamic adjustment allows the system to achieve high communication processing speed when needed while minimizing power consumption during waiting mode.
Solution Approach 2:
The system changes the operating parameters of the oscillator circuit based on mode requirements. The clock frequency parameter is changed from high frequency during normal operation to low frequency or zero frequency during waiting mode. This parameter change enables the system to maintain fast communication processing capability when active while significantly reducing power consumption during waiting mode.
3Productivity
If decoding circuits are always active to analyze received packets, then packet processing capability is maintained, but the overall system power consumption cannot be reduced
Solution Approach 1:
The patent extracts the essential monitoring function from the full decoding circuit by separating it into an independent threshold circuit. This extracted threshold circuit handles the basic signal detection and activation signal generation without requiring the complete decoding functionality. The full decoding circuit is taken out of continuous operation and activated only when needed, reducing overall power consumption while maintaining packet processing capability.
Solution Approach 2:
The threshold circuit performs partial action by processing only the essential signal detection function rather than complete packet decoding. This partial processing is sufficient for generating activation signals, and the full decoding action is performed only when necessary. This approach reduces power consumption by avoiding excessive processing during waiting mode while maintaining adequate productivity when needed.
Data Source
AI summary
A network terminal includes: an oscillator circuit; a communication processing unit which transmits and receives communication data through a transmission path, using the clock; a controller unit which controls a function of the network terminal, using the clock; a clock control unit which causes the oscillator circuit to start or stop oscillating, and supply the clock; and a signal detecting unit which monitors a wave detection signal communicated through the transmission path in the case where the communication processing unit is not operating, and generates an activation signal according to which the clock control unit causes the oscillator circuit to start oscillating at a time when the wave detection signal exceeds a threshold value. The signal detecting unit is operable without using the clock, and the controller unit switches a detectable wave detection signal by changing a circuit constant of the signal detecting unit.