Networked L0 Cache Layout for Low-Latency Data Sharing

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Solution Overview

Problem

Current cache configurations involve standalone L0 caches that are not connected, leading to increased latency and inability to share data, resulting in longer access times and inefficient data retrieval.

Innovation Solution

A uniform cache system where L0 caches are connected in a network configuration, allowing them to actively search for data and share information, reducing latency by propagating requests through adjacent caches until a hit is found or reaching the L2 cache.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If L0 caches are configured as standalone units, then each cache can operate independently, but data access latency increases and data sharing becomes impossible

Engineering Contradiction:
Improveindependent operationVSAvoiddata access latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent connects previously standalone L0 caches into a unified networked structure, allowing them to function both independently and cooperatively. This merging enables data sharing across caches while maintaining individual cache autonomy, thereby reducing access latency without sacrificing operational independence.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a network dimension connecting L0 caches, transforming them from isolated 0-dimensional units to nodes in a 1-dimensional network. This dimensional change enables data propagation across multiple caches, allowing data to be found in adjacent caches rather than requiring access to deeper cache levels, thus reducing latency.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If L0 caches are connected in a network, then data sharing and search capability improve, but routing and arbitration complexity increases

Engineering Contradiction:
Improvedata retrieval efficiencyVSAvoidrouting and arbitration complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the cache system into modular L0 cache units that can be independently managed and routed. Each cache node operates autonomously with standardized interfaces, allowing complex routing tasks to be distributed across multiple simple nodes rather than requiring a single complex arbitration unit. This segmentation reduces overall system complexity while maintaining high productivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent designs L0 cache nodes with universal interfaces and standardized communication protocols, enabling each node to perform multiple functions including data storage, data sharing, and routing. This multi-functionality reduces the need for specialized components, thereby reducing routing and arbitration complexity while improving data retrieval efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If L0 caches actively search and propagate requests, then data access speed improves, but energy consumption increases

Engineering Contradiction:
Improvedata access speedVSAvoidenergy consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements partial search propagation where L0 caches only actively search and propagate requests when necessary (upon cache misses). Rather than continuously searching, caches remain in a low-power state until triggered by access requests, thereby reducing energy consumption while maintaining fast data access speed when needed.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent employs periodic or event-driven search propagation where L0 caches activate their search function only when cache misses occur. This periodic activation pattern allows caches to alternate between low-power standby states and active search states, reducing overall energy consumption while ensuring fast data access when required.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS12487931B2Uniform cache system for fast data access
Publication Date: 2025.12.02 ADVANCED MICRO DEVICES INC
  • US12487931B2 patent drawing
  • US12487931B2 patent drawing
  • US12487931B2 patent drawing

AI summary

A uniform cache for fast data access including a plurality of compute units (CUs) and a plurality of LO caches with an arrangement in a network configuration where each one of CUs is surrounded by a first group of the plurality of LO caches and each of the plurality of LO caches is surrounded by a LO cache group and CU group. One of CUs, upon a request for data, queries the surrounding first group of LO caches to satisfy the request. If the first group of LO caches fails to satisfy the data request, the first group of the plurality of LO caches queries a second group of adjacent LO caches to satisfy the request. If the second group of adjacent LO caches fails to satisfy the data request, the second group of adjacent LO caches propagating the query to the next group of LO caches.