Networking Device Jitter Reduction via Deterministic Egress Timing

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Solution Overview

Problem

Packet-switched networks experience variations in throughput and delay, leading to unacceptable latency issues for real-time media streams, causing buffering overflows or underflows that result in choppy or stopped video or music experiences.

Innovation Solution

Implementing a packet node with a packet ingress interface, an eligible egress time module, and an egress module that determines and enforces a constant eligible egress time for each packet based on its ingress time and a hold interval, preventing packets from egressing until the eligible time, thereby controlling latency variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If packets are transmitted through a packet-switched network with standard queuing and scheduling algorithms, then bandwidth utilization is improved and system cost is reduced, but latency variations and delay jitter increase causing buffering overflows or underflows

Engineering Contradiction:
Improvebandwidth utilizationVSAvoidlatency consistency
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent calculates and stores the eligible egress time for each packet in advance, before the packet actually needs to be transmitted. This preliminary calculation of departure time based on ingress time and hold interval allows the system to prepare transmission schedules ahead of time, ensuring deterministic latency while maintaining efficient bandwidth utilization through proactive resource allocation

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If packets are transmitted with variable processing times and interference from multiple flows, then system flexibility and bandwidth efficiency are improved, but delay characteristics become non-deterministic causing choppy or stopped media playback

Engineering Contradiction:
Improvesystem flexibilityVSAvoiddelay precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent introduces a hold interval parameter that is added to the ingress time to determine the eligible egress time. By changing the time parameter calculation method from standard queuing to a deterministic formula (egress time = ingress time + hold interval), the system achieves precise delay control while maintaining flexibility in handling different packet types and network conditions

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8995458B1Method and apparatus for delay jitter reduction in networking device
Publication Date: 2015.03.31 MARVELL ASIA PTE LTD
  • US8995458B1 patent drawing
  • US8995458B1 patent drawing
  • US8995458B1 patent drawing

AI summary

A networking device reduces delay jitter of a plurality of packets passing through the networking device. The networking device includes an input interface that receives a first packet, a packet memory that stores the first packet, a timestamp module, an egress module, and an output interface. The timestamp module generates a first timestamp corresponding to when the first packet was received. The egress module stores a first output time corresponding to the first packet. The first output time is a sum of the first timestamp and a fixed time interval. The fixed time interval is a difference between an amount of time required to receive a maximum-sized packet and an amount of time required to receive a minimum-sized packet. The output interface is configured to transmit the first packet to a destination networking device in response to a current timestamp being greater than or equal to the first output time.