Networking Device Pseudo-Sleep Mode with Internal PHY Wake
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Solution Overview
Problem
Networking devices lacking an external PHY cannot utilize traditional full sleep mode due to the integral PHY being powered off with the SoC, leading to increased power consumption and cost concerns with adding an external PHY.
Innovation Solution
Implementing a pseudo-sleep mode that powers down internal SoC modules except for the internal PHY, CPU, and memory, while maintaining the external interface for wake commands, and optionally powering off unnecessary external interfaces and reducing CPU frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional full sleep mode is implemented by powering off the SoC, then power consumption is reduced, but the integral PHY cannot remain powered on to receive wake commands
Solution Approach 1:
The patent segments the power management by dividing the SoC into power-downable modules (CPU, memory, most peripherals) and power-retaining modules (integral PHY). This allows selective powering off of components while maintaining the PHY's operation, resolving the contradiction between power savings and wake command reception capability.
Solution Approach 2:
Different parts of the SoC are treated differently regarding power state: the integral PHY maintains a different power quality (remains powered on) compared to other SoC modules (powered off). This local differentiation in power state allows the system to achieve both low power consumption and maintained wake capability.
2Reliability
If an external PHY is added to enable traditional sleep mode, then wake command reception is possible, but device cost and complexity increase
Solution Approach 1:
The integral PHY is made multi-functional by enabling it to perform both its traditional data communication function and the additional function of receiving wake commands while powered on during pseudo-sleep mode. This eliminates the need for a separate external PHY, reducing device complexity while maintaining wake capability.
Solution Approach 2:
The integral PHY serves itself by remaining powered on to handle wake commands without requiring an external PHY component. The system uses the existing integral PHY's capability to its fullest, making it self-sufficient for both data communication and power management functions.
3Loss of energy
If the integral PHY is powered off with the SoC in sleep mode, then power consumption is minimized, but the device cannot respond to wake commands
Solution Approach 1:
Instead of completely powering off the entire SoC (full sleep mode), the patent applies partial action by powering off only the necessary components (CPU, memory, peripherals) while retaining the integral PHY powered on. This partial powering off achieves significant power savings while maintaining device responsiveness to wake commands.
Solution Approach 2:
The system takes preliminary action by keeping the integral PHY powered on in anticipation of needing to receive wake commands, rather than waiting for a wake signal to power up components. This preliminary power retention enables immediate response to wake commands while minimizing overall power consumption during sleep state.
Data Source
AI summary
A networking device includes communication interfaces, a System-on-Chip (SoC), and pseudo-sleep mode logic. The SoC includes a processor, a memory, an internal PHY module, and other internal SoC modules. The pseudo-sleep mode logic is configured to detect receipt of a sleep command and, in response, cause the networking device to enter a pseudo-sleep mode in which the internal SoC modules are powered off, except for the internal PHY module, the processor, and the memory, which remain powered on. The logic is also configured to detect receipt of a wake command while the networking device is in the pseudo-sleep mode and, in response, cause the networking device to exit the pseudo-sleep mode.