Neural Network Chip Architecture With Parallel Fixed-Point Processing
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Solution Overview
Problem
Existing neural networks rely on CPU or GPU for computations, leading to high power consumption and computational inefficiency.
Innovation Solution
An integrated circuit chip apparatus with a main processing circuit and multiple basic processing circuits, equipped with data type conversion circuits, performs neural network computations in parallel and series, reducing computational load and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If neural network computations are performed using CPU or GPU, then computation capability is provided, but power consumption is high and computational efficiency is low
Solution Approach 1:
The processing system is segmented into a main processing circuit and multiple basic processing circuits. The main processing circuit performs control functions and series computations, while the basic processing circuits perform parallel computations. This segmentation enables efficient parallel processing of neural network operations, significantly improving computational efficiency while reducing power consumption compared to using CPU or GPU alone.
2Measurement precision
If data is processed using floating point data type, then precision is maintained, but computational load and power consumption increase
Solution Approach 1:
The system dynamically changes data type parameters based on computational requirements. The main processing circuit converts floating point data to fixed point data for parallel processing in basic processing circuits, reducing computational complexity and power consumption. After parallel computation, results are converted back to floating point format to maintain precision for subsequent series computations in the main processing circuit.
3Productivity
If all neural network computations are performed in series, then control is simplified, but computational efficiency is reduced
Solution Approach 1:
Computational tasks are segmented into series operations performed by the main processing circuit and parallel operations performed by basic processing circuits. The main processing circuit handles control functions, data type conversions, and series computations, while basic processing circuits handle parallel computations. This segmentation achieves efficient parallel processing with manageable control complexity.
Solution Approach 2:
The main processing circuit acts as an intermediary between data input and the basic processing circuits. It performs preliminary data type conversions from floating point to fixed point, distributes data to basic processing circuits for parallel computation, and collects results for final processing. This intermediary role simplifies the overall control structure while enabling efficient parallel computation.
Data Source
AI summary
Provided are an integrated circuit chip apparatus and a related product, the integrated circuit chip apparatus being used for executing a multiplication operation, a convolution operation or a training operation of a neural network. The present technical solution has the advantages of a small amount of calculation and low power consumption.