Neural Network Chip Architecture With Parallel-Series Computing
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Solution Overview
Problem
Existing neural network computations on CPU or GPU require significant computational resources and consume high power due to the large amount of computations involved.
Innovation Solution
An integrated circuit chip apparatus with a main processing circuit and multiple basic processing circuits, where data type conversion between floating point and fixed point data types is performed, allowing for parallel and series computations to reduce overall computational load and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If neural network computations are performed on CPU or GPU, then the computations can be executed, but the power consumption is high and computational resources are significantly consumed
Solution Approach 1:
The processing system is divided into a main processing circuit and multiple basic processing circuits. The basic processing circuits handle parallel neural network computations while the main processing circuit performs series computations, enabling efficient distribution of computational tasks and reducing overall power consumption.
Solution Approach 2:
The patent introduces a hybrid parallel-series computing architecture that adds a dimensional aspect to neural network computation. Basic processing circuits perform parallel computations on input data while the main processing circuit performs series computations on intermediate results, creating a multi-dimensional processing approach that improves efficiency.
2Measurement precision
If data type conversion between floating point and fixed point is implemented, then computational precision can be optimized, but device complexity increases
Solution Approach 1:
Different data types are used in different parts of the processing system. Floating point data type is used in the main processing circuit for high-precision series computations, while fixed point data type is used in basic processing circuits for parallel computations, optimizing precision where needed without unnecessarily increasing complexity throughout the entire system.
Solution Approach 2:
The system dynamically changes data type parameters based on computational requirements. Data is converted between floating point and fixed point formats at appropriate stages of processing, allowing the system to adapt precision levels to match the specific needs of different computational tasks.
Data Source
AI summary
Provided are an integrated circuit chip apparatus and a related product, the integrated circuit chip apparatus being used for executing a multiplication operation, a convolution operation or a training operation of a neural network. The present technical solution has the advantages of a small amount of calculation and low power consumption.