Neural Network Circuit Using Inverse Multipliers for Average Pooling
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Solution Overview
Problem
Conventional neural network circuits face a limitation where the divisor is restricted to values of powers of 2, leading to an increase in circuit scale due to the need for large divider circuits.
Innovation Solution
A neural network circuit is designed with a division unit capable of handling any divisor, incorporating a coefficient holding unit, a multiplier data holding unit, an input data holding unit, a product-sum operator, and a control unit to perform convolution and average pooling operations efficiently without increasing circuit scale.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a divider circuit is used to perform division operation for average pooling, then division by any divisor is enabled, but the circuit scale increases significantly
Solution Approach 1:
The patent changes the fundamental parameter of division operation from direct division to multiplication by inverse number. This parameter transformation allows the circuit to achieve division by any divisor without requiring a complex divider circuit, as the multiplication operation can be performed using simpler existing circuitry in the neural network processor.
Solution Approach 2:
The patent substitutes the mechanical division operation with a multiplication operation. By calculating the inverse number of the divisor once and storing it, the circuit replaces the need for a complex divider with simpler multiplier circuits that are already present in the neural network processing architecture, thereby reducing overall circuit scale.
2Device complexity
If shift operation is used for division, then circuit scale is reduced, but the divisor is limited to values of power of 2
Solution Approach 1:
The patent transforms the division parameter from requiring power-of-2 divisors to accepting any divisor by pre-calculating and storing inverse numbers. This allows the simple shift-based multiplication approach to work with any divisor value, not just powers of 2, thereby expanding the divisor range without increasing circuit complexity.
Solution Approach 2:
The patent performs the inverse number calculation in advance and stores it in memory before the actual division operation is needed. This preliminary action allows the main processing circuit to use simple multiplication with pre-computed values, avoiding the need for complex real-time division circuits while supporting any divisor value.
Data Source
AI summary
Downsized division circuitry is disclosed. In one example, a coefficient holding unit holds a coefficient of a filter used for a convolution operation. A multiplier data holding unit holds, as multiplier data, an inverse number of the number of elements of a pooling window used for an average pooling operation. An input data holding unit holds input data of the convolution operation and the average pooling operation. A control unit performs control to input the input data held in the input data holding unit and the coefficient held in the coefficient holding unit to a product-sum operator for a product-sum calculation for the convolution operation, and performs control to input the input data held in the input data holding unit and the multiplier data held in the multiplier data holding unit to the product-sum operator and cause the product-sum operator to perform a product-sum operation for the average pooling operation.