Neural Network Circuit Semaphore Control for Embedded CNN Throughput
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Solution Overview
Problem
Convolutional neural networks are difficult to implement in embedded devices like IoT devices due to their large scale and the limited hardware resources, making it challenging to achieve sufficient operational performance through software alone.
Innovation Solution
A neural network circuit design with a first and second memory, a convolution operation circuit, a quantization operation circuit, and semaphore controls, allowing for efficient data transfer and operation partitioning to reduce resource usage and enhance performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If large-scale dedicated circuits are used for convolutional neural networks, then operational performance is improved, but device complexity increases and embeddability in embedded devices deteriorates
Solution Approach 1:
The patent divides the neural network processing into separate functional modules: a convolution operation circuit for performing convolution operations, a quantization operation circuit for reducing data precision, and multiple memory units (first memory for input data, second memory for intermediate results, third memory for output data). These segmented modules work together to achieve high-performance neural network operations while maintaining embeddability in resource-constrained devices.
2Device complexity
If software-only implementation is used in embedded devices, then device complexity is reduced, but operational performance deteriorates due to limited hardware resources
Solution Approach 1:
The patent introduces a controller as an intermediary that coordinates between the convolution operation circuit, quantization operation circuit, and memory units. The controller manages data flow and operation sequencing, enabling efficient hardware utilization while maintaining relatively simple embedded device architecture. This intermediary structure allows the system to achieve high operational performance without requiring complex hardware resources.
Data Source
AI summary
A method for controlling a neural network circuit that is provided with a first memory, a convolution operation circuit that performs a convolution operation, a second memory, a quantization operation circuit, a second write semaphore, a second read semaphore, a third write semaphore, and a third read semaphore, wherein the method for controlling the neural network circuit involves making the convolution operation circuit implement a convolution operation based on the third read semaphore and the second write semaphore.