Dynamic Precision Neural Network Core Data Transformation
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Solution Overview
Problem
Existing neural network hardware faces challenges in transforming high-precision input data into compatible low-precision representations, particularly in handling varied precision requirements across different neural network layers and networks, which affects computational efficiency and accuracy.
Innovation Solution
A neural network processor with multiple cores that transforms input data tensors from high precision to processor-specific precision, dividing them into blocks conforming to processor feature dimensions and processing these blocks in parallel across multiple cores to compute output layers efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If high-precision input data is transformed to low-precision processor representations, then energy usage and silicon area are optimized, but computational accuracy may deteriorate
Solution Approach 1:
The input data tensor is divided into multiple blocks, each conforming to processor feature dimensions. Each block is processed independently by neural cores, allowing precision to be optimized per block while maintaining overall accuracy through collective processing of all blocks.
Solution Approach 2:
Different precision levels are applied to different blocks of data based on their specific requirements. The system transforms data from a unified input precision to processor-specific precisions, allowing each block to be processed at the optimal precision level for its characteristics.
2Productivity
If input data tensor is divided into multiple blocks for parallel processing, then productivity is improved, but device complexity increases
Solution Approach 1:
The input data tensor is segmented into multiple blocks that conform to processor feature dimensions. This segmentation enables parallel processing across multiple neural cores, significantly improving computational throughput while the transformation circuit automates the blocking process to manage complexity.
Solution Approach 2:
A transformation circuit is introduced as an intermediary component that automatically handles the complex task of dividing the input data tensor into appropriately sized blocks. This intermediary absorbs the complexity of data manipulation, presenting a simplified interface to both the input data source and the neural core array.
3Adaptability or versatility
If neural network processor uses fixed precision configuration, then device complexity is reduced, but adaptability deteriorates
Solution Approach 1:
The processor is configured with multiple possible precision settings for different feature dimensions, allowing dynamic selection of precision levels based on the specific computational task. This dynamic configuration capability enables the same hardware to adapt to varying precision requirements without requiring physical reconfiguration.
Solution Approach 2:
The neural network processor is designed with multi-functionality to handle multiple precision formats simultaneously. By supporting one or more processor precisions per activation across different feature dimensions, a single processor can perform diverse neural network operations with varying precision requirements, eliminating the need for multiple specialized processors.
Data Source
AI summary
Systems for neural network computation are provided. A neural network processor comprises a plurality of neural cores. The neural network processor has one or more processor precisions per activation. The processor is configured to accept data having a processor feature dimension. A transformation circuit is coupled to the neural network processor, and is adapted to: receive an input data tensor having an input precision per channel at one or more features; transform the input data tensor from the input precision to the processor precision; divide the input data into a plurality of blocks, each block conforming to one of the processor feature dimensions; provide each of the plurality of blocks to one of the plurality of neural cores. The neural network processor is adapted to compute, by the plurality of neural cores, output of one or more neural network layers.