Neural Network ECC Decoding for Lower Bit Error Rates
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Solution Overview
Problem
Current error correction coding techniques in memory devices and wireless baseband circuitry face challenges with increasing area and power needs, leading to higher costs and longer development times, and introduce errors due to bit flips in non-volatile memory devices, which degrade storage and transmission quality.
Innovation Solution
The use of multi-layer neural networks and recurrent neural networks to decode encoded data, transforming noisy data into an error-reduced version with reduced bit error rates and increased signal-to-noise ratios, thereby facilitating efficient error correction and reducing computational resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complex error correction techniques are used, then error reduction capability is improved, but area and power needs increase
Solution Approach 1:
The patent replaces traditional mechanical/error-correction decoding systems with a neural network-based system. The neural network learns error patterns and corrects errors through trained weights and biases, substituting conventional error correction algorithms with a machine learning approach that achieves better error reduction with reduced hardware footprint.
Solution Approach 2:
The patent changes the operational parameters of the error correction system by using neural network weights and biases as adjustable parameters. These parameters are trained offline and then used during runtime, allowing the system to adapt to different error conditions without increasing hardware complexity.
2Reliability
If complex error correction techniques are used, then error reduction capability is improved, but power consumption increases
Solution Approach 1:
The patent replaces power-intensive traditional error correction decoding with a neural network system that consumes less power. The neural network's structure allows for efficient computation through weight multiplication and activation functions, reducing overall power consumption while maintaining or improving error correction performance.
Solution Approach 2:
The patent performs error correction training and parameter optimization in advance (offline), so that during runtime the system only needs to apply pre-computed weights and biases. This preliminary action reduces the computational burden and power consumption during actual error correction operations.
3Ease of manufacture
If traditional decoding methods are used, then implementation is straightforward, but processing speed is slow
Solution Approach 1:
The patent replaces traditional sequential decoding algorithms with a neural network architecture that can process multiple error patterns simultaneously. The parallel nature of neural network computation, combined with hardware acceleration capabilities, significantly increases processing speed while maintaining implementation feasibility through standardized neural network operations.
4Speed
If neural networks are used for error reduction, then processing speed is improved, but device complexity increases
Solution Approach 1:
The patent extracts the complex training and optimization processes from the runtime system, separating them into an offline training phase. The runtime system only needs to apply pre-trained weights and biases, which simplifies the operational complexity while maintaining high processing speed through efficient neural network inference.
Data Source
AI summary
Examples described herein utilize multi-layer neural networks, such as multi-layer recurrent neural networks to estimate an error-reduced version of encoded data based on a retrieved version of encoded data (e.g., data encoded using one or more encoding techniques) from a memory. The neural networks and/or recurrent neural networks may have nonlinear mapping and distributed processing capabilities which may be advantageous in many systems employing a neural network or recurrent neural network to estimate an error-reduced version of encoded data for an error correction coding (ECC) decoder, e.g., to facilitate decoding of the error-reduced version of encoded data at the decoder. In this manner, neural networks or recurrent neural networks described herein may be used to improve or facilitate aspects of decoding at ECC decoders, e.g., by reducing errors present in encoded data due to storage or transmission.