Neural Imaging Pixel Circuit for On-Sensor Feature Compression
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Solution Overview
Problem
Current semiconductor integrated circuits face challenges in achieving high density and large capacity while minimizing off-state current and noise, particularly in imaging devices where photoelectric conversion elements and transistors need to be integrated three-dimensionally with materials suitable for both components, and there is a need for efficient arithmetic operations for artificial intelligence applications.
Innovation Solution
The development of an imaging device with a neural network structure that includes multiple circuits for each pixel, where the first circuit converts light into an analog signal, the second circuit amplifies and adds these signals, and the third circuit uses an activation function to convert them into feature data, integrated using transistors with metal oxide and polycrystalline silicon semiconductor layers to enhance optical sensitivity and reduce noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If three-dimensional integration is used to increase device density and capacity, then the degree of freedom of materials and design rules can be increased, but the manufacturing process becomes more complicated
Solution Approach 1:
The patent implements three-dimensional integration by stacking multiple functional layers vertically: a first substrate with pixel circuits, a second substrate with photoelectric conversion elements, and interconnection layers with conductive plugs and wires. This vertical stacking enables high device density and capacity while maintaining manufacturability through systematic layer-by-layer fabrication processes.
2Reliability
If photoelectric conversion elements and transistors are integrated three-dimensionally with suitable materials, then optical sensitivity and noise characteristics are improved, but manufacturing steps become more complex
Solution Approach 1:
The patent employs different semiconductor materials for different functional regions: oxide semiconductor transistors are used in pixel circuits where low off-state current is critical, while silicon-based photodiodes are used in photoelectric conversion elements where high optical sensitivity is required. This localized material optimization achieves superior device performance while managing manufacturing complexity through specialized process steps for each material type.
3Speed
If neural network arithmetic operations are performed in hardware, then arithmetic operation speed is increased, but device area and complexity increase
Solution Approach 1:
The patent integrates neural network arithmetic operations directly into the imaging device hardware by incorporating multiply-accumulate (MAC) units and activation function circuits within the pixel array. This merging of imaging and computation functions enables high-speed arithmetic operations to be performed in parallel with image capture, eliminating the need for separate processing hardware and reducing overall device area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the compression of pixel data into feature data, increases arithmetic operation speed, and reduces signal deterioration in imaging devices, enabling more efficient processing and integration of imaging elements.
Implementation Method 1
Each of the plurality of first pixels includes a photoelectric conversion element. The photoelectric conversion element is electrically connected to the first circuit. Each of the plurality of first pixels generates an input signal of the neuron in the neural network.
Data Source
AI summary
An imaging device connected to a neural network is provided. An imaging device having a neuron in a neural network includes a plurality of first pixels, a first circuit, a second circuit, and a third circuit. Each of the plurality of first pixels includes a photoelectric conversion element. The plurality of first pixels is electrically connected to the first circuit. The first circuit is electrically connected to the second circuit. The second circuit is electrically connected to the third circuit. Each of the plurality of first pixels generates an input signal of the neuron. The first circuit, the second circuit, and the third circuit function as the neuron. The third circuit includes an interface connected to the neural network.


