Neural Network Memory Management via Dynamic Address Allocation

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Solution Overview

Problem

Convolutional neural networks (CNNs) require significant computational resources and large memory capacity for efficient operation, making it difficult to perform neural network computations on devices with limited memory, such as mobile devices.

Innovation Solution

An information processing device and method that utilizes an external memory device with a limited capacity by managing memory through a memory management table, computing input and output addresses for each layer, and dynamically allocating storage space to efficiently process neural network operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a CNN neural network structure is used for image recognition, then recognition performance is improved, but memory capacity requirement increases

Engineering Contradiction:
Improverecognition rateVSAvoidmemory capacity
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent divides the neural network computation into multiple layers, where each layer processes data independently. The memory management table separately tracks input addresses and output addresses for each layer, allowing granular control over memory usage. This segmentation enables the system to handle large neural network computations with limited memory by processing data in manageable units across multiple layers.

Inventive Principle:
Principle #1Segmentation

2Productivity

If a large capacity memory device is used to store neural network data, then computation capability is improved, but device complexity increases

Engineering Contradiction:
Improvecomputation capabilityVSAvoidmemory device complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces a memory management table as an intermediary structure between the limited external memory and the neural network computation requirements. This table stores mapping relationships between layer identifiers and memory addresses, acting as a mediator that enables efficient data access without requiring large capacity memory devices. The intermediary structure simplifies the memory system while maintaining computation capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Speed

If memory management tables are updated for each layer computation, then data access efficiency is improved, but processing time increases

Engineering Contradiction:
Improvedata access speedVSAvoidprocessing time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent performs preliminary actions by pre-establishing the memory management table structure with layer identifiers and address mappings before computation begins. The table is designed to accommodate all layers in advance, and address mappings are prepared beforehand. This preliminary setup reduces the need for frequent table updates during computation, thereby improving data access speed while minimizing the time lost to management operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11507799B2Information processing apparatus and method of operating neural network computing device therein
Publication Date: 2022.11.22 ELECTRONICS & TELECOMM RES INST
  • US11507799B2 patent drawing
  • US11507799B2 patent drawing
  • US11507799B2 patent drawing

AI summary

Provided is a method of operating a neural network computing device that is configured to communicate with an external memory device and execute a plurality of layers. The method includes computing a first input address, based on first layer information of a first layer among the plurality of layers and a first memory management table, and updating the first memory management table to generate a second memory management table, reading first input data to be input to the first layer from the external memory device, based on the computed first input address, computing a first output address, based on the first layer information and the second memory management table, and updating the second memory management table to generate a third memory management table, and storing first output data output from the first layer, based on the first output address, in the external memory device.