ANN Memory Controller Prefetching for Bandwidth and Latency Bottlenecks

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Solution Overview

Problem

Conventional artificial neural network models face issues such as high power consumption, heating, and bottlenecks due to low memory bandwidth and latency, leading to degraded operation performance and inefficient data processing.

Innovation Solution

An artificial neural network memory system that utilizes data locality information to optimize memory operations by predicting and preparing data access requests in advance, minimizing latency and bandwidth issues through an artificial neural network memory controller.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional memory operations are used for artificial neural network models, then the system can process data, but memory bandwidth is insufficient and latency is high causing processor bottlenecks

Engineering Contradiction:
Improveprocessing speedVSAvoidmemory bandwidth
Core Design Contradiction:
ProductivityVSSpeed

Solution Approach 1:

The memory controller predicts future data access requests by analyzing data locality patterns from previous access sequences, and pre-fetches the predicted data before the processor actually requests it. This preliminary action eliminates waiting time and ensures data is ready when needed, resolving the bandwidth and latency bottleneck.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system continuously monitors actual data access patterns and uses this feedback to refine predictions of future access requests. By comparing predicted accesses with actual processor requests, the memory controller adapts its prediction algorithm to improve accuracy over time, optimizing memory bandwidth utilization dynamically.

Inventive Principle:
Principle #23Feedback

2Productivity

If conventional memory operations are used for artificial neural network models, then the system can process data, but memory latency is high causing processor idle states

Engineering Contradiction:
Improveoperation performanceVSAvoidmemory latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The memory controller analyzes sequences of past data access requests to identify data locality patterns, then predicts future access requests and pre-fetches the data before the processor needs it. This eliminates memory latency by ensuring data is already in the memory buffer when the processor issues the request, preventing processor idle states.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If conventional memory operations are used for artificial neural network models, then the system can process data, but power consumption is high due to inefficient memory access

Engineering Contradiction:
Improvedata processing efficiencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The memory controller predicts and pre-fetches data in optimized sequences based on learned data locality patterns, reducing the total number of memory access operations needed. By batching predictions and utilizing data redundancy, the system minimizes unnecessary memory transactions, thereby reducing power consumption while maintaining or improving processing efficiency.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12530148B2Memory controller circuit and system for artificial neural network and method thereof
Publication Date: 2026.01.20 DEEPX CO LTD
  • US12530148B2 patent drawing
  • US12530148B2 patent drawing
  • US12530148B2 patent drawing

AI summary

According to an example of the present disclosure, a system is provided. A system may include a processor configured to output a memory control signal including an artificial neural network data locality, and a memory controller configured to receive the memory control signal from the processor and control a main memory in which data of an artificial neural network model corresponding to the artificial neural network data locality, is stored.