Analog Neural Memory Output Blocks for Precise VMM Weight Verification
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Solution Overview
Problem
Existing artificial neural networks face challenges in implementing effective input and output mechanisms for vector-by-matrix multiplication (VMM) arrays, particularly in accurately reading and verifying values stored in non-volatile memory cells, which are crucial for precise weight tuning and efficient energy usage.
Innovation Solution
The development of output blocks that include current-to-voltage converters and analog-to-digital converters to generate output bits from non-volatile memory cells, enabling precise programming, reading, and verification of memory cell values, utilizing CMOS technology and non-volatile memory arrays to enhance the efficiency of neural networks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If non-volatile memory arrays are used as synapses in analog neural networks, then energy efficiency is improved, but the ability to accurately read and verify stored weight values deteriorates
Solution Approach 1:
The patent introduces an output block as an intermediary component between the non-volatile memory array and the digital processing system. This output block includes current-to-voltage converters and analog-to-digital converters that mediate the signal transformation process, enabling accurate reading of analog weight values stored in the memory cells while maintaining the energy efficiency benefits of non-volatile memory usage.
Solution Approach 2:
The patent replaces direct digital reading mechanisms with analog signal conversion mechanisms. Instead of attempting to directly read digital values from the memory cells, the system uses current-to-voltage conversion followed by analog-to-digital conversion, substituting a multi-stage analog processing approach for a simpler direct digital read approach, thereby improving measurement precision.
2Use of energy by moving object
If analog computation is used in neural networks, then energy consumption is reduced, but precision in representing weight values deteriorates
Solution Approach 1:
The patent changes the parameter representation by storing weight values as analog quantities (currents or voltages) in non-volatile memory cells rather than as digital values. This parameter change enables analog computation with lower energy consumption while the introduced output block ensures that the analog values can be accurately converted back to digital form when needed for verification or further processing.
3Manufacturing precision
If non-volatile memory cells are programmed to hold specific charge values, then synaptic weight precision is improved, but the complexity of programming and verification mechanisms increases
Solution Approach 1:
The patent merges the programming and verification functions into a unified output block that handles both operations. The same current-to-voltage conversion and analog-to-digital conversion mechanisms are used for both programming memory cells with precise weight values and verifying those values, reducing overall system complexity despite the high precision requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for precise and efficient programming and reading of memory cell values, improving the accuracy and energy efficiency of neural networks by enabling continuous and fine-tuned adjustments to synapse weights, thereby enhancing the performance of artificial neural networks.
Implementation Method 1
Each of the plurality of memory cells is configured to store a weight value corresponding to a number of electrons on the floating gate
Implementation Method 2
a current-to-voltage converter for receiving a sequence of currents from one or more selected non-volatile memory cells
Implementation Method 3
an analog-to-digital converter for converting the voltage or the sequence of voltages into a plurality of output bits
Data Source
AI summary
Numerous embodiments for reading or verifying a value stored in a selected non-volatile memory cell in a vector-by-matrix multiplication (VMM) array in an artificial neural network are disclosed. The embodiments comprise various designs of input blocks for applying inputs to the VMM array during a read or verify operation and various designs of output blocks for receiving outputs from the VMM array during the read or verify operation.


